L9965P datasheet(14/104 Pages) STMICROELECTRONICS

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3.3

Power supply section

3.3.1

Main supply (ERBST)

The ERBST pin is the main supply. This line:

•

Feeds the internal VANA LDO used for biasing the analog circuitry.

•

Feeds the internal VDIG LDO used for biasing the digital circuitry.

•

Feeds the internal VSTBY LDO used for biasing the circuitry in DEEP-SLEEP.

The boost regulator is disabled by default and can be enabled via NVM setting the ERBST_EN bit to 1. Once the

boost regulator is enabled via NVM, it can be turned-off via the ERBST_DIS bit.

Once VERBST > VVBATMON - VERBST_DIS for t > tERBST_READY_FLT, the initial charge phase is over, the

ERBST_RDY bit in the ERBOOST register is set to 1 and the switching operation starts. This ensures the

presence of the external diode between VBATMON pin and ERBST pin. If VERBST < VVBATMON - VERBST_DIS after

tERBST_READY_FLT, the ERBST regulator is turned-off and the ERBST_RDY bit is set to 0.

Once started, the boost operates according to a bang-bang strategy, as shown in the Figure 4:

•

The controller is enabled and boosts the battery voltage whenever VERBST falls below the VER_WKUP_THX

voltage programmed in the VER_WKUP_TH bit field for an interval longer than tER_WKUP_FLT.

While in the duty phase, the IC is kept in NORMAL and any transition to DEEP-SLEEP is delayed until the

setpoint has been reached.

•

The controller is disabled whenever VERBST reaches the target VERBST_XXX setpoint.

This strategy guarantees high energy efficiency meantime the ER cap voltage is always charged for firing the

pyro-fuse. In fact, considering the typical range for CERBST capacitor, the boost controller spends most of the time

in the disabled state.

Figure 4. ERBST controller working principle

ERBST

BOOST

CTRL

ERBST_EN

DISA

BLED

ENABLED

DISABLED

ENABLED

DISABLED

tER_WKUP_FIL

VERBST_FOR_min

tERBST_STARTUP

0.9VERBST_XXX

tDISCHARGE

VERBST_XXX

VER_WKUP_THX

tCHARGE

ΔVDISCHARGE

To allow quick charging of the ER cap at every system startup, the boost controller has been designed to

guarantee a maximum tERBST_STARTUP startup time in the worst-case application scenario.

Moreover, the controller has been designed to limit the maximum power consumption to PIN_ERBST. It is possible

to enable this function through the PIN_LIMIT bit in NVM.

Note:

In applications where the power limitation is required, to limit the initial inrush current it is possible to mount the

resistor RCHG between the VBATMON pin and the ERBST inductor LERBST. Once the initial charge phase has

finished (VERBST > VVBATMON - VERBST_DIS), the ERBST_RDY bit is set to 1. The MCU can read this flag and

drive a GPIO to short the resistor RCHG.

It is possible to kept disabled the ERBST regulator setting ERBST_DIS=1 in the ERBOOST register.

L9965P

Functional description

DS14702 - Rev 4

page 14/104

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