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FS26 Scheda tecnica(PDF) 118 Page - NXP Semiconductors

Il numero della parte FS26
Spiegazioni elettronici  Safety system basis chip with low power for ASIL D/ASIL B
PDF  156 Pages
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS26 Scheda tecnica(HTML) 118 Page - NXP Semiconductors

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NXP Semiconductors
FS26
Safety system basis chip with low power for ASIL D/ASIL B
If the internal pull-down is enabled by OTP, the resistor remains enabled in Low-power modes to avoid floating
nodes. The internal pull-up resistor should be disabled if the GPIOx is used as a high-side or push-pull driver.
Table 118 describes the GPIOx behavior based on the OTP configuration.
Default state
after OTP loaded
Normal mode
Standby mode
GPIOxLP_ON = 0
LPOFF mode /
Deep Fail Safe
GPIOxLP_ON = 0
Configuration
GPIOx
PU_OTP
GPIOx
PD_OTP
PIN HS
LS PIN HS
LS PIN HS
LS PIN HS
LS
0
0
Low OFF ON Hi-Z OFF OFF Hi-Z OFF OFF Hi-Z OFF OFF
1
0
Low OFF ON High OFF OFF Hi-Z OFF OFF Hi-Z OFF OFF
0
1
Low OFF ON Hi-Z OFF OFF Low OFF OFF Low OFF OFF
Low-side
driver
1
1
Low OFF ON High OFF OFF Low OFF OFF Low OFF OFF
-
0
Hi-Z OFF OFF High ON OFF Hi-Z OFF OFF Hi-Z OFF OFF
High-side
driver
-
1
Low OFF OFF High ON OFF Low OFF OFF Low OFF OFF
-
0
Low OFF ON High ON OFF Hi-Z OFF OFF Hi-Z OFF OFF
Push-pull
driver
-
1
Low OFF ON High ON OFF Low OFF OFF Low OFF OFF
Table 118. GPIO Active High mode behavior summary
aaa-045477
LS OFF
VDDIO = LDOx
VDDIO
VDDIO
GPIOx
out
(Slot 2)
GPIOxPU_OTP
GPIOxPD_OTP
LS OFF
PU
disabled
STANDBY
LPOFF
OTP
loading
SLOT1
SLOT2
SLOT1
WAKE UP
EVENT
SLOT2
LP REQ
PD
enabled
LS OFF
OUTPUT
Hi-Z
LDOx LP configuration
LS ON
LS OFF
Internal pull-up enabled
Internal pull-down disabled
LS ON
LS ON
Figure 40. GPIO low-side active high operation. GPIOx_MODE_OTP = 0
 
FS26_SDS
All information provided in this document is subject to legal disclaimers.
© 2025 NXP B.V. All rights reserved.
Product short data sheet
Rev. 6.0 — 12 December 2025
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