LMKDB1104FS datasheet(56/133 Pages) TI2

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Table 9-24. R91 Register Field Descriptions

Bit

Field

Type

Reset

Description

7:4

SLEWRATE_OPT_2

R/W

2h/6h

There are four register assignments each storing a slew rate value

(chosen out of 16 available slew rate values). This register bits relate

to the 2nd option. Go to Programmable Output Slew Rate section for

more information.

0h = 0

1h = 1

2h = 2 (Default for LMKDB1120FS)

3h = 3

4h = 4

5h = 5

6h = 6 (Default for LMKDB1120)

7h = 7

8h = 8

9h = 9

Ah = 10

Bh = 11

Ch = 12

Dh = 13

Eh = 14

Fh = 15

3:0

SLEWRATE_OPT_1

R/W

There are four register assignments each storing a slew rate value

(chosen out of 16 available slew rate values). This register bits relate

to the 1st option. Go to Programmable Output Slew Rate section for

more information.

0h = 0

1h = 1

2h = 2

3h = 3

4h = 4

5h = 5

6h = 6

7h = 7

8h = 8

9h = 9

Ah = 10

Bh = 11

Ch = 12

Dh = 13

Eh = 14

Fh = 15

9.1.23 R92 Register (Offset = 5Ch) [Reset = 00h]

R92 is shown in Table 9-25.

Return to the Summary Table.

LMKDB1102, LMKDB1104, LMKDB1104FS, LMKDB1108, LMKDB1108FS

LMKDB1112, LMKDB1120, LMKDB1120FS

SNAS855G – NOVEMBER 2023 – REVISED MAY 2026

www.ti.com

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