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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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LMKDB1104FS Scheda tecnica(PDF) 85 Page - Texas Instruments |
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LMKDB1104FS Scheda tecnica(HTML) 85 Page - Texas Instruments |
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85 / 133 page  Table 9-93. R17 Register Field Descriptions (continued) Bit Field Type Reset Description 3:0 RESERVED R 0h Reserved 9.4.14 R18 Register (Offset = 12h) [Reset = 08h] R18 is shown in Table 9-94. Return to the Summary Table. Table 9-94. R18 Register Field Descriptions Bit Field Type Reset Description 7 RX_EN_AC_INPUT R/W 0h Enable receiver bias when CLKIN is AC coupled 0h = DC Coupled Input 1h = AC Coupled Input 6 RX_EN_RTERM_LSB R/W 0h Enable/Disables termination resistors on CLKIN1 0h = Disabled 1h = Enabled 5:4 RESERVED R 0h Reserved 3 PD_RESTOREB R/W 1h Save Configuration in Power Down 0h = Config Cleared 1h = Config Saved 2:1 RESERVED R 0h Reserved 0 LOSb_RB R 0h Real time read back of loss detect block output 0h = LOS Event Detected 1h = LOS Event Not-Detected 9.4.15 R20 Register (Offset = 14h) [Reset = EEh] R20 is shown in Table 9-95. Return to the Summary Table. Table 9-95. R20 Register Field Descriptions Bit Field Type Reset Description 7 SLEWRATE_SEL_CLK2_ MSB R/W 1h MSB CLK2 slew rate select 6 SLEWRATE_SEL_CLK3_ MSB R/W 1h MSB CLK3 slew rate select 5 SLEWRATE_SEL_CLK4_ MSB R/W 1h MSB CLK4 slew rate select 4 RESERVED R 0h Reserved 3 SLEWRATE_SEL_CLK5_ MSB R/W 1h MSB CLK5 slew rate select 2 SLEWRATE_SEL_CLK6_ MSB R/W 1h MSB CLK6 slew rate select 1 SLEWRATE_SEL_CLK7_ MSB R/W 1h MSB CLK7 slew rate select 0 RESERVED R 0h Reserved 9.4.16 R21 Register (Offset = 15h) [Reset = 24h] R21 is shown in Table 9-96. Return to the Summary Table. www.ti.com LMKDB1102, LMKDB1104, LMKDB1104FS, LMKDB1108, LMKDB1108FS LMKDB1112, LMKDB1120, LMKDB1120FS SNAS855G – NOVEMBER 2023 – REVISED MAY 2026 Copyright © 2026 Texas Instruments Incorporated Submit Document Feedback 85 Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS |
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