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LMKDB1104FS Scheda tecnica(PDF) 96 Page - Texas Instruments |
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LMKDB1104FS Scheda tecnica(HTML) 96 Page - Texas Instruments |
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96 / 133 page  9.5.18 R39 Register (Offset = 27h) [Reset = 00h] R39 is shown in Table 9-122. Return to the Summary Table. Table 9-122. R39 Register Field Descriptions Bit Field Type Reset Description 7:2 RESERVED R 0h Reserved 1 LOS_EVT R 0h LOS Event Status. When high, indicates that a LOS event is detected. Can be cleared by writing a 1. 0h = Not LOS Event Detected 1h = LOS Event Detected 0 WRITE_LOCK_RW1C R/W1C 0h Clearable SMBus Write Lock bit. When written to one, the SMBus control registers can not be written to. This bit can be cleared by writing a 1. 0h = SMBus Not Locked for Writing 1h = SMBus Locked for Writing 9.5.19 R91 Register (Offset = 5Bh) [Reset = 60h] R91 is shown in Table 9-123. Return to the Summary Table. Table 9-123. R91 Register Field Descriptions Bit Field Type Reset Description 7:4 SLEWRATE_OPT_2 R/W 2h/6h There are four register assignments each storing a slew rate value (chosen out of the 16 available slew rate values). This register bits relate to the 2nd option. Go to Programmable Output Slew Rate section for more information. 0h = 0 (fastest) 1h = 1 2h = 2 (Default for LMKDB1104FS) 3h = 3 4h = 4 5h = 5 6h = 6 (Default for LMKDB1104) 7h = 7 8h = 8 9h = 9 Ah = 10 Bh = 11 Ch = 12 Dh = 13 Eh = 14 Fh = 15 (slowest) LMKDB1102, LMKDB1104, LMKDB1104FS, LMKDB1108, LMKDB1108FS LMKDB1112, LMKDB1120, LMKDB1120FS SNAS855G – NOVEMBER 2023 – REVISED MAY 2026 www.ti.com 96 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS |
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