R5F572TFGDFP datasheet(113/120 Pages) RENESAS

113 / 120 page

R01DS0331EJ0110 Rev.1.10

Page 113 of 120

Oct 06, 2023

RX72T Group

2. Electrical Characteristics

2.13

Flash Memory Characteristics

Note 1. Definition of program/erase cycle:

The program/erase cycle is the number of erasing for each block. When the number of program/erase cycles is n, each block

can be erased n times. For instance, when 256-byte program is performed 32 times for different addresses in 8-Kbyte block and

then the block is erased, the program/erase cycle is counted as one. However, the same address cannot be programmed more

than once before the next erase cycle (overwriting is prohibited).

Note 2. Characteristics are degraded as the number of program/erase increases. This is the minimum value of program/erase cycles to

guarantee all characteristics listed in this table.

Note 3. This shows the characteristic when the flash memory writer or self-programming library from Renesas Electronics is in use, and

the number of times programming and erasure proceed does not exceed the specified value.

Note 4. These values are based on the results of reliability testing.

Table 2.54

Code Flash Memory Characteristics

Conditions: VCC = 2.7 to 5.5 V, VCC_USB = 2.7 to 5.5 V, AVCC0 = AVCC1 = AVCC2 = 3.0 to 5.5V,

VSS = VSS_USB = AVSS0 = AVSS1 = AVSS2 = 0 V,

Temperature range for program/erase: Ta = Topr

Item

Symbol

FCLK = 4 MHz

20 MHz ≤ FCLK ≤ 60 MHz

Unit

Test Conditions

Min.

Typ.

Max.

Min.

Typ.

Max.

Program time

(NPEC ≤ 100 cycles)

256 bytes

tP256

—

0.9

13.2

—

0.4

8 Kbytes

tP8K

—29

176

—13

32 Kbytes

tP32K

—

116

704

—

320

Program time

(NPEC > 100 cycles)

256 bytes

tP256

—

1.1

15.8

—

0.5

7.2

8 Kbytes

tP8K

—35

212

—16

32 Kbytes

tP32K

—

140

848

—

384

Erase time

(NPEC ≤ 100 cycles)

8 Kbytes

tE8K

—71

216

—39

120

32 Kbytes

tE32K

—

254

864

—

141

480

Erase time

(NPEC > 100 cycles)

8 Kbytes

tE8K

—85

260

—47

144

32 Kbytes

tE32K

—

304

1040

—

169

576

Program/erase cycles*1

NPEC

1000*2

—

1000*2

——

Cycles

Program suspend latency

tSPD

—

264

—

120

µs

Primary erase suspend latency in

suspend priority mode

tSESD1

—

216

—

120

Secondary erase suspend latency in

suspend priority mode

tSESD2

——

1.7

—

1.7

Erase suspend latency in erase

priority mode

tSEED

——

1.7

—

1.7

Forced stop command

tFD

——

µs

Data retention*3, *4

tDRP

—

Year

Ta ≤ 85°C

——

Ta ≤ 105°C

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