ORSPI4 datasheet(50/263 Pages) LATTICE

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ORCA ORSPI4 Data Sheet

FIFO ﬁll level and status. When the DPRAM is to be put back into service, the user simply deasserts the LINK_DIS

signal. The associated ports will then be serviced according to the conﬁgured Calendar sequence.

Upon receiving a valid AMA_ID, the AMA logic will service a port by reading data from the FIFO partitions for

BURST_VAL clock cycles. Both data and sideband control signals are read and sent directly to the TDP logic block.

In the event a FIFO partition becomes depleted before BURST_VAL number of reads is performed, the AMA will

send Idle data to the TDP and will override the associated Byte Enable (BE) control signals, indicating the current

data is not user data. This will temporarily reduce the SPI4 transmit link data throughput, but will not affect the oper-

ation of the Transmit link itself.

When reading data from FIFO partitions, and the FIFOs are empty, it is possible to gain back some lost data

throughput on the SPI4 Transmit link. Enabling the TX_BURST_TERMINATION control register within the embed-

ded core causes the AMA to advance to the next port for service within four clock cycles after detecting the FIFO is

empty. This feature works in conjunction with the TX Calendar Control logic. Upon detecting the currently serviced

FIFO has run empty, the AMA block sends a control signal to the Calendar Control logic, which then immediately

advances to the next location within the Calendar and presents a new set of AMA_ID and BURST_VAL ﬁelds to the

AMA block. Because there is a four-clock latency between detection of an empty FIFO and the assertion of the next

port to service, data bandwidth gains can be achieved on ports with larger BURST_VAL values.

Transmit Data Protocol (TDP) Logic Block

The Transmit Data Protocol (TDP) block is responsible for receiving and formatting SPI4 packet data and all asso-

ciated sideband control signals, and formatting the data into the correct SPI4 protocol. This block also performs

DIP-4 calculation, SPI4 data word, control word and Training control word generation. Additionally, this block

attempts to perform bandwidth optimization by combining ordered Bytes from 2 consecutive 128-bit words from the

AMA whenever possible. This is done to maximize data throughput on the Transmit SPI4 link.

The TDP provides a small FIFO to allow for data buffering in order to concatenate valid Bytes with idles. In the

event the FIFO becomes full, it sends a FIFO_FULL ﬂag to the Transmit Calendar Control Word logic to throttle

data transmission. Flow control is necessary for small periods of time while Training patterns are being sent across

the Transmit SPI4 link.

Data formatting performed in this block consists of alignment, DIP-4 calculation and training pattern generation.

Aligner:

Using the SOP, EOP and Port control signals the TDP determines what type of control word is necessary to be

transmitted with the corresponding data. Using the BE bits, the TDP can determine how to concatenate data into

sequences of continuous 16 Byte bursts whenever possible.

DIP-4 Calculation:

After aligning the data and control words, the TDP calculates the odd parity codeword according to the OIF SPI4

speciﬁcation.

Training Pattern Generation:

There are two causes of generating a Training sequence for the Transmit SPI4 link:

• Using the user-programmable TX_DATA_MAX_T register, or

• The TDP receives four or more consecutive '11' patterns from the status block, indicating excess DIP-2 errors.

Using the programmed TX_DATA_MAX_T register along with the user-programmable TX_ALPHA register, the TDP

internally counts down the correct number of clock cycles before transmitting training sequences across the Trans-

mit link. The TX_ALPHA register is used to indicate the number of Training sequences to be sent.

When the Transmit status receives excessive errors, the status block sends consecutive '11' patterns to the TDP.

According to the SPI4 speciﬁcation, the TDP will begin sending training patterns across the SPI4 link until the sta-

tus error is remedied.

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