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ORSPI4 Scheda tecnica(PDF) 26 Page - Lattice Semiconductor

Il numero della parte ORSPI4
Spiegazioni elettronici  Dual SPI4 Interface and High-Speed SERDES FPSC
PDF  263 Pages
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Produttore elettronici  LATTICE [Lattice Semiconductor]
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ORSPI4 Scheda tecnica(HTML) 26 Page - Lattice Semiconductor

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Lattice Semiconductor
ORCA ORSPI4 Data Sheet
26
The bit ordering in the data format in the 128-bit aggregation mode is shown in Figure 9. The first byte of a packet
is always byte 0 of the 128-bit word. As shown in the figure, SOP is always aligned to the most significant 64-bit
Word 0 of a 2-word burst. SOP is always aligned to byte 0 of the 128-bit word.
Figure 9. Byte and Bit Ordering in 128-Bit Mode
31
23
15
7
0
Byte12 Byte 13 Byte 14 Byte 15
63
55
47
39
32
Byte 8 Byte 9 Byte 10 Byte 11
95
87
79
71
64
Byte 4 Byte 5 Byte 6 Byte 7
127
119
111
103 96
Byte 0 Byte 1 Byte 2 Byte 3
Clock 1
Word 0
SPI[A,B]_RX128_SOP
127
0
95 63
31
DPRAM
FPGA
Word 0
Time
SPI[A,B]_RX128_DATA[127:0]
SPI[A,B]_TX128_DATA[127:0] or
SPI[A,B]_TX128_SOP



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