HD6432138SW datasheet(168/1061 Pages) RENESAS

Il numero della parte	HD6432138SW

Spiegazioni elettronici	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1061 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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Section 5 Interrupt Controller

Rev. 4.00 Jun 06, 2006 page 114 of 1004

REJ09B0301-0400

IRQn interrupt

request

IRQnE

IRQnF

Clear signal

Edge/level

detection circuit

IRQnSCA, IRQnSCB

IRQn input

Note: n: 7 to 0

Figure 5.3 Block Diagram of Interrupts IRQ7 to IRQ0

Figure 5.4 shows the timing of IRQnF setting.

IRQn

input pin

IRQnF

Figure 5.4 Timing of IRQnF Setting

The vector numbers for IRQ7 to IRQ0 interrupt exception handling are 23 to 16.

Detection of IRQ7 to IRQ0 interrupts does not depend on whether the relevant pin has been set for

input or output. Therefore, when a pin is used as an external interrupt input pin, do not clear the

corresponding DDR bit to 0 and use the pin as an I/O pin for another function. When the

IRQ6 pin

is assigned as the IRQ6 interrupt input pin, then set the KMIMR6 bit to 0.

As interrupt request flags IRQ7F to IRQ0F are set when the setting condition is met, regardless of

the IER setting, only the necessary flags should be referenced.

HD6432138SW Scheda tecnica(PDF) 168 Page - Renesas Technology Corp