H8SSLASH2218 datasheet(387/750 Pages) RENESAS

Il numero della parte	H8S/2218

Spiegazioni elettronici	16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

PDF	750 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

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Section 10 Watchdog Timer (WDT)

Rev.6.00 Jun. 03, 2008 Page 339 of 698

REJ09B0074-0600

Section 10 Watchdog Timer (WDT)

The watchdog timer (WDT) is an 8-bit timer that can generate an internal reset signal for this LSI

if a system crash prevents the CPU from writing to the timer counter, thus allowing it to overflow.

When this watchdog function is not needed, the WDT can be used as an interval timer. In interval

timer operation, an interval timer interrupt is generated each time the counter overflows.

The block diagram of the WDT is shown in figure 10.1.

10.1

Features

• Selectable from eight counter input clocks

• Switchable between watchdog timer mode and interval timer mode

In watchdog timer mode:

• If the counter overflows, it is possible to select whether this LSI is internally reset or not.

In interval timer mode:

• If the counter overflows, the WDT generates an interval timer interrupt (WOVI).

WDT0104A_000020011200

H8S/2218 Scheda tecnica(PDF) 387 Page - Renesas Technology Corp