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H8S/2218 Scheda tecnica(PDF) 646 Page - Renesas Technology Corp |
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H8S/2218 Scheda tecnica(HTML) 646 Page - Renesas Technology Corp |
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646 / 750 page ![]() Section 19 Clock Pulse Generator Rev.6.00 Jun. 03, 2008 Page 598 of 698 REJ09B0074-0600 Bit Bit Name Initial Value R/W Description 6 LSON 0 R/W Low Speed ON Flag 0: When the SLEEP instruction is executed in high-speed mode or medium-speed mode, operation shifts to sleep mode, software standby mode, or watch mode*. When the SLEEP instruction is executed in subactive mode, operation shifts to watch mode* or shifts directly to high-speed mode. Operation shifts to high-speed mode when watch mode is cancelled. 1: When the SLEEP instruction is executed in high-speed mode*, operation shifts to watch mode or subactive mode*. When the SLEEP instruction is executed in subactive mode, operation shifts to subsleep mode or watch mode. Operation shifts to subactive mode when watch mode is cancelled. 5 NESEL 0 R/W Noise Elimination Sampling Frequency Select This bit selects the sampling frequency of the subclock ( φ SUB) generated by the subclock oscillator is sampled by the clock ( φ) generated by the system clock oscillator 0: Sampling using 1/32 x φ 1: Sampling using 1/4 x φ 4 SUBSTP 0 R/W Subclock Enable This bit enables/disables subclock generation. This bit should be set to 1 when subclock is not used. 0: Enables subclock generation. 1: Disables subclock generation. |
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