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ATtiny261-ESSZ Scheda tecnica(PDF) 89 Page - ATMEL Corporation |
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ATtiny261-ESSZ Scheda tecnica(HTML) 89 Page - ATMEL Corporation |
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89 / 227 page ![]() 89 7753C–AVR–07/09 ATtiny261/ATtiny461/ATtiny861 15. Timer/Counter1 Prescaler Figure 15-1 shows the Timer/Counter1 prescaler that supports two clocking modes, a synchro- nous clocking mode and an asynchronous clocking mode. The synchronous clocking mode uses the system clock (CK) as a clock timebase and asynchronous mode uses the fast peripheral clock (PCK) as a clock time base. The PCKE bit from the PLLCSR register enables the asyn- chronous mode when it is set (‘1’). Figure 15-1. Timer/Counter1 Prescaler In the asynchronous clocking mode the clock selections are from PCK to PCK/16384 and stop, and in the synchronous clocking mode the clock selections are from CK to CK/16384 and stop. The clock options are described in Table 15-1 on page 91 and the Timer/Counter1 Control Reg- ister, TCCR1B. The frequency of the fast peripheral clock is 64 MHz or 32 MHz in Low Speed mode (the LSM bit in PLLCSR register is set to one). The Low Speed Mode is recommended to use when the sup- ply voltage below 2.7 volts are used. 15.0.1 Prescaler Reset Setting the PSR1 bit in TCCR1B register resets the prescaler. It is possible to use the Prescaler Reset for synchronizing the Timer/Counter to program execution. 15.0.2 Prescaler Initialization for Asynchronous Mode To change Timer/Counter1 to the asynchronous mode follow the procedure below: 1. Enable PLL. 2. Wait 100 µs for PLL to stabilize. 3. Poll the PLOCK bit until it is set. 4. Set the PCKE bit in the PLLCSR register which enables the asynchronous mode. TIMER/COUNTER1 COUNT ENABLE PSR1 CS10 CS11 CS12 PCK 64/32 MHz 0 CS13 14-BIT T/C PRESCALER S A CK PCKE T1CK |
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