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ATtiny261-ESSZ Scheda tecnica(PDF) 108 Page - ATMEL Corporation |
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ATtiny261-ESSZ Scheda tecnica(HTML) 108 Page - ATMEL Corporation |
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108 / 227 page ![]() 108 7753C–AVR–07/09 ATtiny261/ATtiny461/ATtiny861 Figure 16-13. PWM6 Mode, Single-slope Operation, Timing Diagram The general I/O port function is overridden by the Output Compare value (OC1x / OC1x) from the Dead Time Generator if either of the COM1x1:0 bits are set. The Output Compare pins can also be overridden by the Output Compare Override Enable bits OC1OE5..OC1OE0. If an Over- ride Enable bit is cleared, the actual value from the port register will be visible on the port pin and, if the Override Enable bit is set, the Output Compare pin is allowed to be connected on the port pin. The Output Compare Pin configurations are described in Table 16-5. TCNT1 OC1A Pin OC1A Pin OC1B Pin OC1B Pin OC1D Pin OC1D Pin OC1OE0 OC1OE1 OC1OE2 OC1OE3 OC1OE4 OC1OE5 OCW1A |
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