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ATtiny261-ESSZ Scheda tecnica(PDF) 154 Page - ATMEL Corporation |
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ATtiny261-ESSZ Scheda tecnica(HTML) 154 Page - ATMEL Corporation |
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154 / 227 page ![]() 154 7753C–AVR–07/09 ATtiny261/ATtiny461/ATtiny861 Figure 19-12. Differential Non-linearity (DNL) • Quantization Error: Due to the quantization of the input voltage into a finite number of codes, a range of input voltages (1 LSB wide) will code to the same value. Always ± 0.5 LSB. • Absolute Accuracy: The maximum deviation of an actual (unadjusted) transition compared to an ideal transition for any code. This is the compound effect of offset, gain error, differential error, non-linearity, and quantization error. Ideal value: ± 0.5 LSB. 19.8 ADC Conversion Result After the conversion is complete (ADIF is high), the conversion result can be found in the ADC Result Registers (ADCL, ADCH). The form of the conversion result depends on the type of the conversion as there are three types of conversions: single ended conversion, unipolar differen- tial conversion and bipolar differential conversion. 19.8.1 Single Ended Conversion For single ended conversion, the result is where V IN is the voltage on the selected input pin and VREF the selected voltage reference (see Table 19-4 on page 157 and Table 19-5 on page 158). 0x000 represents analog ground, and 0x3FF represents the selected voltage reference minus one LSB. The result is presented in one-sided form, from 0x3FF to 0x000. 19.8.2 Unipolar Differential Conversion If differential channels and an unipolar input mode are used, the result is where VPOS is the voltage on the positive input pin, VNEG the voltage on the negative input pin, and VREF the selected voltage reference (see Table 19-4 on page 157 and Table 19-5 on page 158). The voltage on the positive pin must always be larger than the voltage on the negative pin or otherwise the voltage difference is saturated to zero. The result is presented in one-sided form, from 0x000 (0d) to 0x3FF (+1023d). The GAIN is either 1x, 8x, 20x or 32x. Output Code 0x3FF 0x000 0 VREF Input Voltage DNL 1 LSB ADC VIN 1024 ⋅ VREF ----------------------------- = ADC VPOS VNEG – () 1024 ⋅ VREF ----------------------------------------------------------- GAIN ⋅ = |
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