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ATtiny261-ESSZ Scheda tecnica(PDF) 209 Page - ATMEL Corporation |
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ATtiny261-ESSZ Scheda tecnica(HTML) 209 Page - ATMEL Corporation |
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209 / 227 page  209 7753C–AVR–07/09 ATtiny261/ATtiny461/ATtiny861 25. Register Summary Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page 0x3F (0x5F) SREG I T H S V N Z C page 11 0x3E (0x5E) SPH – – – – – SP10 SP9 SP8 page 13 0x3D (0x5D) SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 page 13 0x3C (0x5C) Reserved – 0x3B (0x5B) GIMSK INT1 INT0 PCIE1 PCIE0 – – – – page 53 0x3A (0x5A) GIFR INTF1 INTF0 PCIF – – – – – page 53 0x39 (0x59) TIMSK OCIE1D OCIE1A OCIE1B OCIE0A OCIE0B TOIE1 TOIE0 TICIE0 page 87, page 125 0x38 (0x58) TIFR OCF1D OCF1A OCF1B OCF0A OCF0B TOV1 TOV0 ICF0 page 88, page 126 0x37 (0x57) SPMCSR – – SIGRD CTPB RFLB PGWRT PGERS SPMEN page 169 0x36 (0x56) PRR PRTIM1 PRTIM0 PRUSI PRADC page 36 0x35 (0x55) MCUCR –PUD SE SM1 SM0 –ISC01 ISC00 page 38, page 69, page 52 0x34 (0x54) MCUSR – – – – WDRF BORF EXTRF PORF page 45, 0x33 (0x53) TCCR0B – – – TSM PSR0 CS02 CS01 CS00 page 71 0x32 (0x52) TCNT0L Timer/Counter0 Counter Register Low Byte page 86 0x31 (0x51) OSCCAL Oscillator Calibration Register page 32 0x30 (0x50) TCCR1A COM1A1 COM1A0 COM1B1 COM1B0 FOC1A FOC1B PWM1A PWM1B page 115 0x2F (0x4F) TCCR1B PWM1X PSR1 DTPS11 DTPS10 CS13 CS12 CS11 CS10 page 169 0x2E (0x4E) TCNT1 Timer/Counter1 Counter Register page 123 0x2D (0x4D) OCR1A Timer/Counter1 Output Compare Register A page 124 0x2C (0x4C) OCR1B Timer/Counter1 Output Compare Register B page 124 0x2B (0x4B) OCR1C Timer/Counter1 Output Compare Register C page 124 0x2A (0x4A) OCR1D Timer/Counter1 Output Compare Register D page 125 0x29 (0x49) PLLCSR LSM PCKE PLLE PLOCK page 90 0x28 (0x48) CLKPR CLKPCE CLKPS3 CLKPS2 CLKPS1 CLKPS0 page 33 0x27 (0x47) TCCR1C COM1A1S COM1A0S COM1B1S COM1B0S COM1D1 COM1D0 FOC1D PWM1D page 119 0x26 (0x46) TCCR1D FPIE1 FPEN1 FPNC1 FPES1 FPAC1 FPF1 WGM11 WGM10 page 121 0x25 (0x45) TC1H TC19 TC18 page 123 0x24 (0x44) DT1 DT1H3 DT1H2 DT1H1 DT1H0 DT1L3 DT1L2 DT1L1 DT1L0 page 127 0x23 (0x43) PCMSK0 PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 page 54 0x22 (0x42) PCMSK1 PCINT15 PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8 page 54 0x21 (0x41) WDTCR WDIF WDIE WDP3 WDCE WDE WDP2 WDP1 WDP0 page 46 0x20 (0x40) DWDR DWDR[7:0] page 36 0x1F (0x3F) EEARH EEAR8 page 22 0x1E (0x3E) EEARL EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 page 22 0x1D (0x3D) EEDR EEPROM Data Register page 23 0x1C (0x3C) EECR – – EEPM1 EEPM0 EERIE EEMPE EEPE EERE page 23 0x1B (0x3B) PORTA PORTA7 PORTA6 PORTA5 PORTA4 PORTA3 PORTA2 PORTA1 PORTA0 page 69 0x1A (0x3A) DDRA DDA7 DDA6 DDA5 DDA4 DDA3 DDA2 DDA1 DDA0 page 69 0x19 (0x39) PINA PINA7 PINA6 PINA5 PINA4 PINA3 PINA2 PINA1 PINA0 page 69 0x18 (0x38) PORTB PORTB7 PORTB6 PORTB5 PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 page 69 0x17 (0x37) DDRB DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 page 69 0x16 (0x36) PINB PINB7 PINB6 PINB5 PINB4 PINB3 PINB2 PINB1 PINB0 page 69 0x15 (0x35) TCCR0A TCW0 ICEN0 ICNC0 ICES0 ACIC0 CTC0 page 85 0x14 (0x34) TCNT0H Timer/Counter0 Counter Register High Byte page 86 0x13 (0x33) OCR0A Timer/Counter0 Output Compare Register A page 86 0x12 (0x32) OCR0B Timer/Counter0 Output Compare Register B page 86 0x11 (0x31) USIPP USIPOS page 139 0x10 (0x30) USIBR USI Buffer Register page 136 0x0F (0x2F) USIDR USI Data Register page 135 0x0E (0x2E) USISR USISIF USIOIF USIPF USIDC USICNT3 USICNT2 USICNT1 USICNT0 page 136 0x0D (0x2D) USICR USISIE USIOIE USIWM1 USIWM0 USICS1 USICS0 USICLK USITC page 137 0x0C (0x2C) GPIOR2 General Purpose I/O Register 2 page 24 0x0B (0x2B) GPIOR1 General Purpose I/O Register 1 page 24 0x0A (0x2A) GPIOR0 General Purpose I/O Register 0 page 24 Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the value of single bits can be checked by using the SBIS and SBIC instructions. 3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operation the specified bit, and can therefore be used on registers containing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. |
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