WM8953ECSSLASHRV datasheet(65/100 Pages) WOLFSON

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Production Data

WM8953

PD, January 2009, Rev 4.0

COMPANDING

The WM8953 supports A-law and

µ-law companding. This is selected as shown in Table 36.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

ADC_COMP

ADC Companding Enable

0 = disabled

1 = enabled

R5 (05h)

ADC_COMPMODE

ADC Companding Type

0 = µ-law

1 = A-law

Table 36 Companding Control

Companding involves using a piecewise linear approximation of the following equations (as set out

by ITU-T G.711 standard) for data compression:

µ-law (where µ=255 for the U.S. and Japan):

F(x) = ln( 1 +

µ|x|) / ln( 1 + µ)

-1 ≤ x ≤ 1

A-law (where A=87.6 for Europe):

F(x) = A|x| / ( 1 + lnA)

} for x ≤ 1/A

F(x) = ( 1 + lnA|x|) / (1 + lnA)

} for 1/A ≤ x ≤ 1

The companded data is also inverted as recommended by the G.711 standard (all 8 bits are inverted

for

µ-law, all even data bits are inverted for A-law). The data will be transmitted as the first 8 MSBs

of data.

Companding converts 13 bits (

µ-law) or 12 bits (A-law) to 8 bits using non-linear quantization. This

provides greater precision for low amplitude signals than for high amplitude signals, resulting in a

greater usable dynamic range than 8 bit linear quantization. The companded signal is an 8-bit word

comprising sign (1 bit), exponent (3 bits) and mantissa (4 bits).

8-bit mode is selected whenever ADC_COMP=1. The use of 8-bit data allows samples to be passed

using as few as 8 BCLK cycles per LRC frame. When using DSP mode B, 8-bit data words may be

transferred consecutively every 8 BCLK cycles.

8-bit mode (without Companding) may be enabled by setting ADC_COMPMODE=1, when

ADC_COMP=0.

BIT7

BIT[6:4]

BIT[3:0]

SIGN

EXPONENT

MANTISSA

Table 37 8-bit Companded Word Composition

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