WM8953ECSSLASHRV datasheet(23/100 Pages) WOLFSON

Il numero della parte	WM8953ECS/RV

Spiegazioni elettronici	Low Power Stereo ADC with PLL and TDM Interface

PDF	100 Pages

Scroll/Zoom	100%

Produttore elettronici	WOLFSON [Wolfson Microelectronics plc]

Homepage	http://www.wolfsonmicro.com

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23 / 100 page

Production Data

WM8953

PD, January 2009, Rev 4.0

INTERNAL POWER ON RESET CIRCUIT

Figure 11 Internal Power on Reset Circuit Schematic

The WM8953 includes an internal Power-On-Reset Circuit, as shown in Figure 11, which is used to

reset the digital logic into a default state after power up. The POR circuit is powered from AVDD and

monitors DCVDD. It asserts PORB low if AVDD or DCVDD is below a minimum threshold.

Figure 12 Typical Power up Sequence where AVDD is Powered before DCVDD

Figure 12 shows a typical power-up sequence where AVDD comes up first. When AVDD goes above

the minimum threshold, Vpora, there is enough voltage for the circuit to guarantee PORB is asserted

low and the chip is held in reset. In this condition, all writes to the control interface are ignored. Now

AVDD is at full supply level. Next DCVDD rises to Vpord_on and PORB is released high and all

registers are in their default state and writes to the control interface may take place.

On power down, where AVDD falls first, PORB is asserted low whenever AVDD drops below the

minimum threshold Vpora_off.

WM8953ECS/RV Scheda tecnica(PDF) 23 Page - Wolfson Microelectronics plc