P83C266BDR datasheet(34/92 Pages) PHILIPS

34 / 92 page

1999 Mar 10

Philips Semiconductors

Product speciﬁcation

Microcontrollers for PAL/SECAM TV

with OSD and VST

P8xCx66 family

14 PIN FUNCTION SELECTION

Ports 1, 3 and 5 are dual purpose ports and can be

configured as general I/O port lines or selected as

alternative functions. Selection of the pin function as an

alternative function is achieved by setting the associated

port latch bit to a logic 1 and then enabling the alternative

function using its associated SFR.

14.1

Port 1 pin function selection

Port 1 is an 8-bit port which can be configured as eight

bidirectional port lines (P1.0 to P1.7) or as two external

interrupts (INT0 and INT1), two timer/counter inputs

(T0 and T1) and the I2C-bus lines (SDA and SCL).

P1.0 and P1.7 have no alternative functions.

To configure these pins as alternative functions the

corresponding bit in the Port 1 Latch (P1) should be

programmed to a logic 1. The I2C-bus lines are enabled by

setting the I2CE bit in the I2C-bus Port Control Register,

see Section 10.8. The remaining alternative functions are

enabled using the associated SFR.

To use Port 1 pins as general I/O lines the alternative

functions must be disabled.

14.2

Port 5 and P3.3 pin function selection

Port 5 pins can be selected as eight bidirectional port lines

(P5.0 to P5.7) or as seven 7-bit PWM outputs

(PWM0 to PWM6) and one 14-bit PWM output (TPWM).

Each 7-bit PWM output can be selected by setting the

PWMnE bit in its associated PWMn register, to a logic 1

(see Section 15.1). When the PWMnE bit is a logic 0 the

port line function is selected. The 14-bit PWM output

(TPWM) is selected by setting the TPWME bit in SFR

TDACH to a logic 1 (see Section 15.2).

P3.3 can also be selected as a bidirectional port line (P3.3)

or as a 7-bit PWM output (PWM7). The 7-bit PWM output

is enabled by setting the PWME7 bit in SFR PWM7 to a

logic 1 (see Section 15.1).

14.3

Port 3 pin function selection

Port 3 is a 4-bit port which can be configured as four

bidirectional port lines (P3.0 to P3.3) or as 3 ADC inputs

(ADC0 to ADC2) and one 7-bit PWM output (PWM7).

The selection of the PWM7 output is discussed in

Section 14.2.

To select the alternative function of these port lines the

corresponding bit in the Port 3 Latch (P3) should be

programmed to a logic 1. The ADC inputs are then

enabled using the SFR SAD2 as described in

Section 14.3.1.

To use Port 3 pins as general I/O lines the alternative

functions must be disabled.

14.3.1

ADC CONTROL REGISTER 2 (SAD2)

Table 36 ADC Control Register 2 (SFR address CAH)

Table 37 Description of SAD2 bits

76543210

−−−−−

ADCE2

ADCE1

ADCE0

BIT

SYMBOL

DESCRIPTION

7to3

−

These 5 bits are not used.

ADCE2

ADC2 input select. If ADC2 = 1, the ADC2 input is selected. If ADC2 = 0, the

open-drain bidirectional port line P3.2 is selected.

ADCE1

ADC1 input select. If ADC1 = 1, the ADC1 input is selected. If ADC2 = 0, the

open-drain bidirectional port line P3.1 is selected.

ADCE0

ADC0 input select. If ADC0 = 1, the ADC0 input is selected. If ADC0 = 0, the

open-drain bidirectional port line P3.0 is selected.

P83C266BDR Scheda tecnica(PDF) 34 Page - NXP Semiconductors

P83C266BDR Scheda tecnica(HTML) 34 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Scheda tecnica Scarica

Link URL