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P83C266BDR Scheda tecnica(PDF) 19 Page - NXP Semiconductors

Il numero della parte P83C266BDR
Spiegazioni elettronici  80C51 8-bit CPU
PDF  92 Pages
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Produttore elettronici  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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P83C266BDR Scheda tecnica(HTML) 19 Page - NXP Semiconductors

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1999 Mar 10
19
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV
with OSD and VST
P8xCx66 family
Table 8
Selection of SCL frequency in Master mode
10.4
Status Register (S1STA)
S1STA is an 8-bit read-only Special Function Register. The contents of S1STA may be used as a vector to a service
routine. This optimizes response time of the software and consequently that of the I2C-bus. The status codes for all
possible modes of the I2C-bus interface are given in Table 12. The abbreviations used in Table 12 are defined in
Table 11.
Table 9
Status Register (SFR address D9H)
Table 10 Description of S1STA bits
Table 11 Abbreviations used in Table 12
CR2
CR1
CR0
fosc DIVISOR
BIT RATE (kHz) at fosc = 12 MHz
0
0
0
60
200
0
0
1
1600
7.5
0
1
0
40
300
0
1
1
30
400
1
0
0
240
50
1
0
1
3200
3.75
1
1
0
160
75
1
1
1
120
100
76543210
SC4
SC3
SC2
SC1
SC0
0
0
0
BIT
SYMBOL
DESCRIPTION
7 to 3
SC4 to SC0
5-bit status code; see Table 12.
2to0
These 3 bits are held LOW.
SYMBOL
DESCRIPTION
SLA
7-bit slave address
R
read bit
W
write bit
ACK
acknowledgment (Acknowledge bit = 0)
ACK
not acknowledge (Acknowledge bit = 1)
DATA
8-bit byte to or from the I2C-bus
MST
master
SLV
slave
TRX
transmitter
REC
receiver



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