SSM4567ACBZ-R7 datasheet(44/52 Pages) AD

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SSM4567

Data Sheet

Rev. 0| Page 44 of 52

BATTERY VOLTAGE OUTPUT REGISTER

Address: 0x0C, Reset: 0x00, Name: BATTERY_V_OUT

Table 38. Bit Descriptions for BATTERY_V_OUT

Bits

Bit Name

Settings

Description

Reset

Access

[7:0]

VBAT

8-Bit Unsigned Battery Voltage

0x0

LIMITER CONTROL 1 REGISTER

Address: 0x0D, Reset: 0xA4, Name: LIMITER_CTRL_1

Table 39. Bit Descriptions for LIMITER_CTRL_1

Bits

Bit Name

Settings

Description

Reset

Access

[7:6]

SLOPE

Limiter Ratio below the VBAT_INF threshold. Limiter ratio once the VBAT voltage falls

below the VBAT_INF threshold. This sets the slope of the limiter curve as the VBAT

voltage falls.

0x2

R/W

1:1 Limiter Ratio

2:1 Limiter Ratio

3:1 Limiter Ratio

4:1 Limiter Ratio

[5:3]

VBAT_INF

Battery Voltage Inflection point. When VBAT drops below the inflection point and

VBAT_TRACK = 1 the limiter threshold starts being lowered to limit maximum output

and peak current from the battery. The amount of reduction when the battery voltage

is lower than VBAT_INF is determined by the SLOPE bits.

0x4

R/W

000

3.9 V

001

3.8 V

010

3.7 V

011

3.6 V

100

3.5 V

101

3.4 V

110

3.3 V

111

3.2 V

VBAT_TRACK

Threshold Battery Tracking Enable

0x1

R/W

Limiter Attack Threshold Fixed

Limiter Attack Threshold Varies or gain reduction with Battery Voltage

[1:0]

LIM_EN

Limiter or Mute mode Enable

0x0

R/W

Limiter and mute mode Off

Limiter On

Output will mute if VBAT is below VBAT_INF

Limiter On but will only engage if VBAT is below VBAT_INF

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