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GD25S513MDFEG Scheda tecnica(PDF) 41 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25S513MDFEG Scheda tecnica(HTML) 41 Page - GigaDevice Semiconductor (Beijing) Inc. |
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41 / 94 page ![]() 3.3V Uniform Sector Dual and Quad Serial Flash GD25S513MD 41 Figure 33. DTR Quad I/O Fast Read Sequence Diagram (ADS=0 or ADS=1) Command 0 1 2 3 4 5 6 7 EEH CS# SCLK IO0 IO1 8 9 10 11 19 20 4 0 4 0 4 0 4 0 4 0 4 0 5 1 5 1 5 1 5 1 5 1 5 1 A31-0 6 2 6 2 6 2 6 2 6 2 6 2 7 3 7 3 7 3 7 3 7 3 7 3 IO2 Byt e1 Byte2 M7-0 DQS IO3 4 0 5 1 6 2 7 3 12 High-Z Dummy |
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