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LMKDB1104FS Scheda tecnica(PDF) 120 Page - Texas Instruments

Il numero della parte LMKDB1104FS
Spiegazioni elettronici  LMKDB11xx PCIe Gen 1 to Gen 7 Ultra Low Jitter LP-HCSL Clock Buffer Family
PDF  133 Pages
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
Logo TI2 - Texas Instruments

LMKDB1104FS Scheda tecnica(HTML) 120 Page - Texas Instruments

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PACKAGE OUTLINE
C
0.9
0.8
0.05
0.00
5.5
TYP
5.5 TYP
0.5
TYP
0.5 TYP
80X
0.3
0.2
2.8 0.1
B
6.1
5.9
A
6.1
5.9
(0.725)
(0.725)
(0.125)
(0.125)
4224877/A 03/2019
TLGA - 0.9 mm max height
NPP0080A
THIN LAND GRID ARRAY
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
CORNER
PIN A1
SEATING PLANE
0.08 C
A
1
2
3
0.1
C A B
0.05
C
4
5
6
7
8
9
10
11
12
SYMM
SYMM
B
C
D
E
F
G
H
J
K
L
M
PIN 1 ID
(45 X 0.35)
SCALE 2.500



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