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H8S/2218 Scheda tecnica(PDF) 242 Page - Renesas Technology Corp

Il numero della parte H8S/2218
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  750 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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Section 7 DMA Controller (DMAC)
Rev.6.00 Jun. 03, 2008 Page 194 of 698
REJ09B0074-0600
7.4.7
DMAC Activation Sources
DMAC activation sources consist of internal interrupts, external requests, and auto-requests. The
activation sources that can be specified depend on the transfer mode, as shown in table 7.8.
Table 7.8
DMAC Activation Sources
Full Address Mode
Activation
Source
Short Address
Mode
Normal Mode
Block Transfer
Mode
Internal
ADI
×
Interrupt
TXI0
×
RXI0
×
TGI0A
×
TGI1A
×
TGI2A
×
USB request Low level input of the
DREQ
signal
×
×
Auto-request
×
×
Legend:
: Can be specified
×: Cannot be specified
Activation by Internal Interrupt: An interrupt request selected as a DMAC activation source can
be sent simultaneously to the CPU. For details, see section 5, Interrupt Controller.
With activation by an internal interrupt, the DMAC accepts the request independently of the
interrupt controller. Consequently, interrupt controller priority settings are not accepted.
If the DMAC is activated by an interrupt request that is not used as a CPU interrupt source (DTA =
1), the interrupt source flag is cleared automatically by the DMA transfer. With ADI, TXI, and
RXI interrupts, however, the interrupt source flag is not cleared unless the prescribed register is
accessed in a DMA transfer. If the same interrupt is used as an activation source for more than one
channel, the interrupt request flag is cleared when the highest-priority channel is activated first.
Transfer requests for other channels are held pending in the DMAC, and activation is carried out in
order of priority.
When DTE = 0, such as after completion of a transfer, a request from the selected activation
source is not sent to the DMAC, regardless of the DTA bit. In this case, the relevant interrupt



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