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CDPCLK4 Scheda tecnica(PDF) 170 Page - Altera Corporation |
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CDPCLK4 Scheda tecnica(HTML) 170 Page - Altera Corporation |
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170 / 274 page ![]() 9–12 Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family Configuration Features Cyclone III Device Handbook August 2012 Altera Corporation Volume 1 AS Configuration (Serial Configuration Devices) In the AS configuration scheme, Cyclone III device family is configured using a serial configuration device. These configuration devices are low-cost devices with non-volatile memories that feature a simple four-pin interface and a small form factor. These features make serial configuration devices the ideal low-cost configuration solution. f For more information about serial configuration devices, refer to the Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet chapter in volume 2 of the Configuration Handbook. In Cyclone III device family, the active master clock frequency runs at a maximum of 40 MHz, and typically at 30 MHz. Cyclone III device family only work with serial configuration devices that support up to 40 MHz. Serial configuration devices provide a serial interface to access configuration data. During device configuration, Cyclone III device family reads configuration data using the serial interface, decompress data if necessary, and configure their SRAM cells. This scheme is referred to as the AS configuration scheme because the device controls the configuration interface. Active Parallel ×16 Fast (AP Fast POR, for Cyclone III devices only) 0 1 1 0 1.8 Passive Serial Standard (PS Standard POR) 0 0 0 0 3.3/3.0/2.5 Passive Serial Fast (PS Fast POR) 1 1 0 0 3.3/3.0/2.5 Fast Passive Parallel Fast (FPP Fast POR) (4) 1 1 1 0 3.3/3.0/2.5 Fast Passive Parallel Fast (FPP Fast POR) (for Cyclone III devices only) (4) 1 1 1 1 1.8/1.5 Fast Passive Parallel Fast (FPP Fast POR) (for Cyclone III LS devices only) 0 0 0 1 1.8/1.5 Fast Passive Parallel Fast (FPP Fast POR) with Encryption (for Cyclone III LS devices only) 0 1 0 1 3.3/3.0/2.5 Fast Passive Parallel Fast (FPP Fast POR) with Encryption (for Cyclone III LS devices only) 0 1 1 0 1.8/1.5 JTAG-based configuration (5) (6) (6) (6) (6) — Notes to Table 9–7: (1) Altera recommends connecting the MSEL pins to VCCA or GND depending on the MSEL pin settings. (2) The configuration voltage standard is applied to the VCCIO supply of the bank in which the configuration pins reside. (3) You must follow specific requirements when interfacing Cyclone III device family with 2.5-, 3.0-, and 3.3-V configuration voltage standards. For more information about these requirements, refer to “Configuration and JTAG Pin I/O Requirements” on page 9–7. (4) FPP configuration is not supported in the Cyclone III E144 device package of Cyclone III devices. (5) The JTAG-based configuration takes precedence over other configuration schemes, which means the MSEL pin settings are ignored. (6) Do not leave the MSEL pins floating. Connect them to VCCA or GND. These pins support the non-JTAG configuration scheme used in production. Altera recommends connecting the MSEL pins to GND if your device is only using the JTAG configuration. Table 9–7. Cyclone III Device Family Configuration Schemes (1) (Part 2 of 2) Configuration Scheme MSEL Configuration Voltage Standard (V) (2), (3) 32 1 0 |
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