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CDPCLK4 Scheda tecnica(PDF) 249 Page - Altera Corporation |
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CDPCLK4 Scheda tecnica(HTML) 249 Page - Altera Corporation |
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249 / 274 page ![]() Chapter 10: Hot-Socketing and Power-On Reset in the Cyclone III Device Family 10–3 Hot-Socketing Feature Implementation July 2012 Altera Corporation Cyclone III Device Handbook Volume 1 Hot-Socketing Feature Implementation Each I/O pin has the circuitry shown in Figure 10–1. The hot-socketing circuit does not include CONF_DONE, nCEO, and nSTATUS pins to ensure that they are able to operate during configuration. Thus, it is expected behavior for these pins to drive out during power up and power down sequences. Figure 10–1 shows the hot-socketing circuit block diagram for Cyclone III device family. The POR circuit monitors the voltage level of power supplies and keeps the I/O pins tristated until the device is in user mode. The weak pull-up resistor (R) in Cyclone III device family I/O element (IOE) keeps the I/O pins from floating. The 3.3-V tolerance control circuit permits the I/O pins to be driven by 3.3 V before VCCIO, VCC, and VCCA supplies are powered up, and it prevents the I/O pins from driving out when the device is not in user mode. 1 Altera uses GND as reference for hot-socketing operation and I/O buffer designs. To ensure proper operation, Altera recommends connecting the GND between boards before connecting the power supplies. This prevents the GND on your board from being pulled up inadvertently by a path to power through other components on your board. A pulled up GND can otherwise cause an out-of-specification I/O voltage or current condition with the Altera® device. POR Circuitry Cyclone III device family contains POR circuitry to keep the device in a reset state until the power supply voltage levels have stabilized during power up. During POR, all user I/O pins are tristated until the VCC reaches the recommended operating levels. In addition, the POR circuitry also ensures the VCCIO level of I/O banks 1, 6, 7, and 8 that contains configuration pins reach an acceptable level before configuration is triggered. Figure 10–1. Hot-socketing Circuit Block Diagram for Cyclone III Device Family Output Enable V CCIO Hot Socket Output Pre-Driver Voltage Tolerance Control Power On Reset Monitor Weak Pull-Up Resistor PAD Input Buffer to Logic Array R |
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