CDPCLK4 datasheet(250/274 Pages) ALTERA

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10–4

Chapter 10: Hot-Socketing and Power-On Reset in the Cyclone III Device Family

Document Revision History

Cyclone III Device Handbook

July 2012

Altera Corporation

Volume 1

The POR circuit of the Cyclone III device monitors the VCCINT, VCCIO (banks 1, 6, 7,

and 8), and VCCA pins during power-on. The enhanced POR circuit of the Cyclone III

LS device includes monitoring VCCBAT to ensure that VCCBAT is always at the minimum

requirement voltage level.

1 The VCCBAT power supply is the new design security feature power supply introduced

for Cyclone III LS devices only. Cyclone III devices do not have VCCBAT power supply.

After Cyclone III device family enters user mode, the POR circuit continues to

monitor the VCCINT or VCCA pins so that a brown-out condition during user mode is

detected. If the VCCINT or VCCA voltage sags below the POR trip point during user

mode, the POR circuit resets the device. If the VCCIO voltage sags during user mode,

the POR circuit does not reset the device.

In some applications, it is necessary for a device to wake up very quickly to begin

operation. Cyclone III device family offers the Fast-On feature to support fast

wake-up time applications. For Cyclone III device family, the MSEL[3..0] pin settings

determine the POR time (tPOR) of the device. Fast POR ranges from 3 ms to 9 ms, while

standard POR ranges from 50 ms to 200 ms.

If you cannot meet the maximum VCC ramp time requirement, use an external

component to hold nCONFIG low until the power supplies have reached their

minimum recommend operating levels. Otherwise, the device may not properly

configure and enter user mode.

f For more information about the MSEL[3..0] pin settings, refer to the Configuration,

Design Security, and Remote System Upgrades in the Cyclone III Device Family chapter.

f For more information about the VCCBAT pin connection, refer to the Cyclone III Device

Family Pin Connection Guidelines.

Document Revision History

Table 10–1 lists the revision history for this document.

Table 10–1. Document Revision History (Part 1 of 2)

Date

Version

Changes

July 2012

3.4

Updated tolerance control circuit voltage level in the “Hot-Socketing Feature

Implementation” section.

December 2011

3.3

■ Updated “POR Circuitry” on page 10–3.

■ Updated hyperlinks.

■ Minor text edits.

December 2009

3.2

Minor changes to the text.

July 2009

3.1

Made minor correction to the part number.

June 2009

3.0

■ Updated chapter part number.

■ Updated “I/O Pins Remain Tristated During Power-Up” on page 10–2.

■ Updated “Hot-Socketing Feature Implementation” on page 10–3.

■ Updated “POR Circuitry” on page 10–4.

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