CY8C52LP datasheet(46/114 Pages) CYPRESS

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PSoC® 5LP: CY8C52LP Family

Datasheet

Document Number: 001-84933 Rev. *L

Page 46 of 114

7.5 USB

PSoC includes a dedicated Full-Speed (12 Mbps) USB 2.0

transceiver supporting all four USB transfer types: control,

interrupt, bulk, and isochronous. PSoC Creator provides full

configuration support. USB interfaces to hosts through two

dedicated USBIO pins, which are detailed in the “I/O System and

Routing” section on page 32.

USB includes the following features:



Eight unidirectional data endpoints



One bidirectional control endpoint 0 (EP0)



Shared 512-byte buffer for the eight data endpoints



Dedicated 8-byte buffer for EP0



Three memory modes



Manual Memory Management with No DMA Access



Manual Memory Management with Manual DMA Access



Automatic Memory Management with Automatic DMA

Access



Internal 3.3 V regulator for transceiver



Internal 48 MHz oscillator that auto locks to USB bus clock,

requiring no external crystal for USB (USB equipped parts only)



Interrupts on bus and each endpoint event, with device wakeup



USB Reset, Suspend, and Resume operations



Bus powered and self powered modes

Figure 7-14. USB

7.6 Timers, Counters, and PWMs

The Timer/Counter/PWM peripheral is a 16-bit dedicated

peripheral providing three of the most common embedded

peripheral features. As almost all embedded systems use some

combination of timers, counters, and PWMs. Four of them have

been included on this PSoC device family. Additional and more

advanced functionality timers, counters, and PWMs can also be

instantiated in Universal Digital Blocks (UDBs) as required.

PSoC Creator allows you to choose the timer, counter, and PWM

features that they require. The tool set utilizes the most optimal

resources available.

The Timer/Counter/PWM peripheral can select from multiple

clock sources, with input and output signals connected through

the DSI routing. DSI routing allows input and output connections

to any device pin and any internal digital signal accessible

through the DSI. Each of the four instances has a compare

output, terminal count output (optional complementary compare

output), and programmable interrupt request line. The

Timer/Counter/PWMs are configurable as free running, one shot,

or Enable input controlled. The peripheral has timer reset and

capture inputs, and a kill input for control of the comparator

outputs. The peripheral supports full 16-bit capture.

Timer/Counter/PWM features include:



16-bit timer/counter/PWM (down count only)



Selectable clock source



PWM comparator (configurable for LT, LTE, EQ, GTE, GT)



Period reload on start, reset, and terminal count



Interrupt on terminal count, compare true, or capture



Dynamic counter reads



Timer capture mode



Count while enable signal is asserted mode



Free run mode



One Shot mode (stop at end of period)



Complementary PWM outputs with deadband



PWM output kill

Figure 7-15. Timer/Counter/PWM

S I E

(Serial Interface

Engine)

48 MHz

IMO

Arbiter

512 X 8

SRAM

USB

I/O

D+

D–

Interrupts

External 22



Resistors

Timer / Counter /

PWM 16-bit

Clock

Reset

Enable

Capture

Kill

IRQ

Compare

TC / Compare!

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