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EP9312 Scheda tecnica(PDF) 19 Page - Cirrus Logic

Il numero della parte EP9312
Spiegazioni elettronici  Universal Platform System-on-chip Processor
PDF  62 Pages
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Produttore elettronici  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

EP9312 Scheda tecnica(HTML) 19 Page - Cirrus Logic

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19
EP9312
Universal Platform SOC Processor
Static Memory Single Word Read Cycle
See “Timing Conditions” on page 14 for definition of HCLK.
Parameter
Symbol
Min
Typ
Max
Unit
AD setup to CSn assert time
tADs
0-
-
ns
AD hold from CSn deassert time
tADh
tHCLK
-
-ns
RDn assert time
tRDpw
-
tHCLK × (WST1 + 2)
-ns
CSn to RDn delay time
tRDd
--
3
ns
CSn assert to DQMn assert delay time
tDQMd
--
1
ns
DA setup to RDn deassert time
tDAs
tHCLK + 12
--
ns
DA hold from RDn deassert time
tDAh
0-
-
ns
Figure 6. Static Memory Single Word Read Cycle Timing Measurement
CSn
WRn
RDn
DQMn
AD
DA
t
ADs
t
RDd
t
DQMd
t
ADh
t
RDd
t
DAs
t
DAh
WAIT



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