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EP9312 Scheda tecnica(PDF) 35 Page - Cirrus Logic |
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EP9312 Scheda tecnica(HTML) 35 Page - Cirrus Logic |
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35 / 62 page ![]() DS515PP7 ©Copyright 2005 Cirrus Logic (All Rights Reserved) 35 EP9312 Universal Platform SOC Processor Note: The definitions for the DIOWn:STOP, DIORn:HDMARDYn:HSTROBE and IORDY:DDMARDYn:DSTROBE signal lines are not in effect until DMARQ and DMACKn are asserted. Figure 19. Initiating an Ultra DMA data-in Burst DMARQ (device) DMACKn (host) STOP (host) HDMARDYn (host) DSTROBE (device) DD (15:0) IDEDA[2:0] IDECS0n, IDECS1n t UI t ACK t ACK t ACK t AZ t ZIORDY t ENV t ZAD t DVS t DVH t FS t ZAD t ENV |
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