EP9312 datasheet(40/62 Pages) CIRRUS

Il numero della parte	EP9312

Spiegazioni elettronici	Universal Platform System-on-chip Processor

PDF	62 Pages

Scroll/Zoom	100%

Produttore elettronici	CIRRUS [Cirrus Logic]

Homepage	http://www.cirrus.com

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40 / 62 page

DS515PP7

EP9312

Universal Platform SOC Processor

Note:

DD (15:0) and HSTROBE signals are shown at both the device and the host to emphasize that cable settling time as well as

cable propagation delay shall not allow the data signals to be considered stable at the device until some time after they are

driven by the host.

Figure 25. Sustained Ultra DMA data-out Burst

Note:

1. The device may negate DMARQ to request termination of the Ultra DMA burst no sooner than tRP after DDMARDYn is

negated.

2. If the tSR timing is not satisfied, the device may receive zero, one, or two more data words from the host.

Figure 26. Device Pausing an Ultra DMA data-out Burst

HSTROBE

(host)

DD (15:0)

(host)

HSTROBE

(device)

DD (15:0)

(device)

CYCWR

2CYCWR

CYCWR

DVH

DVS

DVH

DVS

DVH

DD (15:0)

(host)

HSTROBE

(host)

DDMARDYn

(device)

STOP

(host)

DMACKn

(host)

DMARQ

(device)

RFS

EP9312 Scheda tecnica(PDF) 40 Page - Cirrus Logic

EP9312 Scheda tecnica(HTML) 40 Page - Cirrus Logic

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