FS23 datasheet(55/230 Pages) NXP

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NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

• The wake-up interrupts used to manage the wake-up from the Low-Power modes

The list of all the interrupts is given in Table 26.

The “classic” interrupts are maskable. If the interrupts are not masked, a pulse will be generated on the INTB

pin. Out of Normal mode, most of these interrupt flags will not be generated, because the monitoring functions

associated will be disabled. In addition, the WKx_I, HVIOx_I, LVIOx_I, and LVI5_I flags are not generated out of

Normal mode.

The I/Os are considered as wake-up sources, with the CAN, LIN, and LDT. A wake-up event on these functions

will generate a non-maskable wake-up flag (xxxx_WU_I). An interrupt pulse will be generated on INTB if the

wake-up source is enabled following SPI/I2C configuration (xxxx_WUEN[1:0] bits). Each wake-up source can be

configured to generate an interrupt, a transition to Normal mode, or both.

In LPON mode, if a wake-up event occurs and the wake-up source is enabled, an interrupt is generated, and/

or the device transitions to Normal mode. If only the interrupt generation is enabled, it is the MCU's decision to

request a transition to Normal mode or not, via GO2NORMAL SPI/I2C bit.

In LPOFF mode, if a wake-up event occurs and the wake-up source is enabled, the device transitions to Normal

mode.

15.5.2 Electrical characteristics

TA = −40 °C to 125 °C, unless otherwise specified. VSUP = 5.5 V to 40 V, unless otherwise specified. All

voltages referenced to ground.

Symbol

Parameter

Min

Typ

Max

Unit

Interrupt pin

INTBPULL-up

Internal pullup resistor to VDDIO

kΩ

INTBVOL

Low-output level (IOUT = 2 mA)

0.4

INTBVOH

High-output level

VDDIO

– 0.5V

INTBILIM

INTB current limitation

4.0

TINTB_PULSE

Pulse duration

INTB_DUR = 0 (short)

INTB_DUR = 1 (long)

17.5

25.0

100

32.5

130

μs

TINTB_TO

INTB timeout for wake-up event

TINTB_DLY

Delay between INTB_REQ command reception

and INTB pulse start

μs

Table 26. INTB electrical characteristics

Interrupt

Description

Mask/Enable

Event interrupt

VSUP_UV_I

VSUP undervoltage

VSUP_UV_M

VSUP_OV_I

VSUP overvoltage

VSUP_OV_M

VSHS_UV_I

VSHS undervoltage

VSHS_UV_M

VSHS_OV_I

VSHS overvoltage

VSHS_OV_M

V1TWARN_I

V1 high-temperature warning

V1TWARN_M

VxTSD_I

Vx overtemperature (x = 1, 2, 3)

VxTSD_M

Table 27. List of interrupts from main logic

FS23

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7.0 — 16 October 2024

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