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FS23 Scheda tecnica(PDF) 57 Page - NXP Semiconductors

Il numero della parte FS23
Spiegazioni elettronici  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS23 Scheda tecnica(HTML) 57 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
16 High-side drivers
16.1 Functional description
The FS23 provides four high-side drivers, supplied by VSHS supply voltage. Each high-side driver (HSx) can be
used to drive loads, such as LEDs, or to perform cyclic sense in combination with a high-voltage input (WAKEx,
HVIOx).
Each HSx can be controlled by different sources, configurable by SPI/I2C (HSx_SRC_SEL):
• HSx_EN and HSx_DIS SPI/I2C control bits
• Any input (WAKEx, HVIOx, LVIOx, LVI5)
• One of the TIMERx (x = 1, 2, 3) for cyclic sense
• One of the PWMx (x = 1, 2, 3) for LED driving
Undervoltage and overvoltage is implemented on the HSx supply VSHS. In case of under/overvoltage detection,
all the HSx are kept enabled or disabled depending on SPI/I2C configuration via HS_VSHSUV_DIS and
HS_VSHSOV_DIS bits. When the HSx are disabled because of a UV/OV on VSHS, an automatic recovery
of the HSx functions is possible if enabled via HS_VSHSUVOV_REC bit. If not, the MCU will enable the HSx
again.
The HSx are monitored by pair for overtemperature. If the temperature of HS1 or HS2 rises above the
overtemperature threshold, HS12_TSD_I flag is generated. If the temperature of HS3 or HS4 rises above the
overtemperature threshold, HS34_TSD_I flag is generated.
All four HSx are also monitored individually for overcurrent (short-circuit detection) and open load. When an
overcurrent is detected, a flag is generated (HSx_OC_I) and the concerned high-side driver is disabled. When
an open load is detected, a flag is generated (HSx_OL_I).
16.2 LED driving
The high-side drivers can be used to drive LEDs, with one of the three PWMs configured as source. The
frequency of each PWM is configurable between 200 Hz and 400 Hz (PWMx_F), and the duty cycle is
configurable on 10 bits from 0 % to 100 % (PWMx_DC[9:0]). A configurable delay (PWMx_DLY) can be applied
to both the rising and falling edges of each PWMx in order to limit the inrush current on VSHS supply if multiple
HSx are used with a PWM at the same time. LED driving is controlled by SPI/I2C using PWMx_EN bits.
16.3 Cyclic sense
The high-side drivers can be used for cyclic sense, with one of the three TIMERs configured as source and one
of the high-voltage inputs among WAKE1, WAKE2, HVIO1, and HVIO2 configured as a sensing input.
Cyclic sense is enabled by SPI/I2C using TIMx_EN bits. Both the period and the ON time of each TIMER
are configurable by SPI/I2C using TIMERx_PER[2:0] and TIMERx_ON[3:0] bits. The period is configurable
from 10.24 ms to 2048 ms and the ON time is configurable from 0.128 ms to 204.8 ms. A configurable delay
(TIMERx_DLY) can be added to both the rising and falling edges of each TIMERx in order to limit the inrush
current on the VSHS supply if multiple HSx are used with a TIMER at the same time.
When used for cyclic sense, an HSx is turned ON following the ON time of the associated TIMERx. At the end
of each ON time, at each falling edge, the state of the high-voltage input pin is sampled and stored for one
period. If two successive samples show different states, a flag is generated. See Figure 31.
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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