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FS23 Scheda tecnica(PDF) 100 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 100 Page - NXP Semiconductors |
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100 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers An 8-bit CRC is required for each write and read I2C command. Computation of a CRC is derived from the mathematics of polynomial division, modulo two. The CRC polynomial used is x^8+x^4+x^3+x^2+1 defined by SAE-J1850 (identified by 0x1D) with a SEED value of hexadecimal '0xFF'. 20.1.2 Device address The I2C address has the following arrangement: • Bit 39: 0 • Bit 38: 1 • Bit 37 to 34: OTP value • Bit 33: 0 B39 B38 B37 B36 B35 B34 B33 0 1 I2CDEVADDR_OTP[3:0] 0 Table 64. Device address 20.1.3 I2C CRC calculation and results CRC calculation using XOR: CRC_7 = XOR ( B38, B35, B32, B31, B24, B23, B22, B20, B17, B13, B12, B11, 1, 1, 1) CRC_6 = XOR ( B37, B34, B23, B22, B21, B19, B16, B12, B11, B10, 1, 1) CRC_5 = XOR ( B39, B36, B33, B30, B29, B22, B21, B20, B18, B15, B11, B10, B9, 1, 1, 1) CRC_4 = XOR ( B39, B38, B35, B32, B29, B28, B21, B20, B19, B17, B14, B10, B9, B8, 1, 1, 1, 1) CRC_3 = XOR ( B37, B35, B34, B32, B28, B27, B24, B23, B22, B19, B18, B17, B16, B12, B11, B9, B8, 1, 1, 1, 1) CRC_2 = XOR ( B39, B38, B36, B35, B34, B33, B32, B27, B26, B24, B21, B20, B18, B16, B15, B13, B12, B10, B8, 1, 1, 1, 1, 1, 1, 1) CRC_1 = XOR ( B37, B34, B33, B26, B25, B24, B22, B19, B15, B14, B13, B9, 1, 1, 1) CRC_0 = XOR ( B39, B36, B33, B32, B25, B24, B23, B21, B18, B14, B13, B12, B8, 1, 1, 1, 1) Device address + R/W 0b0 + Register address Data 8-bit CRC 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0xAC 0x41 0x02 0x0000 0xAC 0 1 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0x38 0x44 0x7F 0xD001 0x38 Table 65. CRC result examples FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 100 / 230 |
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