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FS23 Scheda tecnica(PDF) 93 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 93 Page - NXP Semiconductors |
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93 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers aaa-051410 VBOS/V1/VDDIO LOGIC RSTB To MCU reset VDDIO 1 nF 5.1 kΩ RPD Figure 51. RSTB pin implementation A 1 ms or 10 ms delay is added before RSTB is released, depending on RSTB_DUR bit (pre-selectable by OTP) to accommodate specific MCU requirement asking for voltage supply stabilization before RSTB is released. TA = −40 °C to 125 °C, unless otherwise specified. VSUP = 5.5 V to 40 V, unless otherwise specified. All voltages referenced to ground. Symbol Parameter Min Typ Max Unit Static electrical characteristics RSTBVIL Low-level input voltage 0 - 0.7 V RSTBVIH High-level input voltage 1.5 - - V RSTBVOL Low-level output voltage (I = 2.0 mA) - - 0.4 V RSTBRPD Internal pulldown resistor 1 2 4 MΩ RSTBILIM Current limitation 4.0 - 22.0 mA Dynamic electrical characteristics RSTBTFB Feedback filtering time 8 10 16 us RSTBTSC Short- to high-detection timer 500 650 800 us RSTBEXT External reset detection time 20 30 40 µs RSTBTLG Long pulse (configurable with RSTB_DUR bit) 8.5 - 11.5 ms RSTBTST Short pulse (configurable with RSTB_DUR bit) 0.85 - 1.15 ms RSTBT8S 8 second timer 7.0 8.0 9.0 s RSTBTFALL Fall time (pull up to VDDIO = 5 V, 1 nF output capacitor) - - 8 us RSTBTRELEASE Time to release RSTB from POR or LPOFF - With all slots used - With RSTB_DUR = 1 (1 ms) - 4 6 ms External components RSTBRPU External pullup resistor to VDDIO (nominal) - 5.1 - kΩ RSTBCOUT External filtering capacitor - 1 - nF Table 55. RSTB electrical characteristics FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 93 / 230 |
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