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FS23 Scheda tecnica(PDF) 96 Page - NXP Semiconductors |
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FS23 Scheda tecnica(HTML) 96 Page - NXP Semiconductors |
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96 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers TA = −40 °C to 125 °C, unless otherwise specified. VSUP = 5.5 V to 40 V, unless otherwise specified. All voltages referenced to ground. Symbol Parameter Min Typ Max Unit LIMP0VIL Low-level input voltage 0 - 0.7 V LIMP0VIH High-level input voltage 1.5 - - V LIMP0VOL Low-level output voltage (I = 2.0mA) - - 0.5 V LIMP0RPD Internal pulldown resistor 1 2 4 MΩ LIMP0ILIM Current limitation 4.0 - 22.0 mA Dynamic electrical characteristics LIMP0TFB Feedback filtering time 8 10 16 µs LIMP0TSC Short- to high-detection timer 500 650 800 µs Fall time (pull up to VSUP = 14 V, 10 nF output capacitor) - - 35 µs LIMP0TFALL Fall time (pull up to VSUP = 14 V, no output capacitor) - - 10 µs External components External pullup resistor to VDDIO (nominal) - 5.1 - kΩ LIMP0RPU External pullup resistor to VSUP (nominal) - 10 - kΩ LIMP0RSER External serial resistor (optional, 0805 package size) - 5.1 - kΩ LIMP0COUT1 External output capacitor (close to the pin) - 10 - nF LIMP0COUT2 External output capacitor (optional, after the serial resistor) - 22 - nF Table 58. LIMP0 electrical characteristics...continued 19.6.5 LIMP0 release When the fail-safe outputs LIMP0 is asserted low by the device because of a fault, some conditions must be validated before allowing LIMP0 pin to be released by the device. These conditions are: • No fault affecting LIMP0 reported • Fault error counter = 0 • Device in Normal mode • Device not in INIT mode • FS_FS0B_LIMP0_REL register filled with the correct value, depending on current WD_TOKEN[15:0] value as per Table 57. 19.6.6 LIMP1, LIMP2 Two additional pseudo-safety output can be used when configuring general purpose I/Os or high-side drivers as LIMP1 or LIMP2 functions. HVIO1, LVIO3, or HS1 can be configured as LIMP1 function and HVIO2, LVIO4, or HS3 can be configured as LIMP2 function. When used, LIMP1 and LIMP2 are following LIMP0 assertion, except when requested from the MCU. LIMP1 and LIMP2 paths can also be checked by the MCU by requesting their assertion by SPI/I2C. When asserted, LIMP1 and/or LIMP2 will be released when LIMP0 is released. If LIMP0 is already released (that is, LIMP1 or LIMP2 was asserted after MCU request), a LIMP0 release request must be sent by the SPI to release them. LIMP1 and LIMP2 can work as asserted to a static level (high or low), or as PWM (configurable polarity) when asserted, depending on LIMPx_CFG[1:0] bit. FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 96 / 230 |
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