FS23 datasheet(87/230 Pages) NXP

87 / 230 page

NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

19.4.4 VxMON deglitch time

The OV and UV deglitch times are configured independently by OTP at VxMON_UVDGLT_OTP[1:0] and

VxMON_OVDGLT_OTP.

VxMON_UVDGLT_OTP[1:0]

UV detection time

VxMON_OVDGLT_OTP

OV detection time

5 µs

25 µs

15 µs

45 µs

25 µs

40 µs

Table 49. VxMON deglitch time

19.4.5 VxMON safety reaction (impact)

When an overvoltage or undervoltage fault is detected, the fail-safe reaction on RSTB, FS0B, or LIMP0 is

configurable with VxMON_OV/UV_RSTB/FS0B/LIMP0_IMPACT bits during the INIT phase, for each monitoring

input. The reactions of RSTB pin can be pre-selected by OTP.

19.4.6 V1UVLP monitoring

In LPON mode, all the VxMON monitoring are disabled. Only V1 is monitored for undervoltages at V1UVLP

= 3.065 V. In case the V1 voltage goes lower than this threshold, the device goes into Fail-Safe state (not

configurable), and V1_UVLP_WU bit is set to 1.

V1 is also monitored for V1UVLP when the device powers up after a wake up from LPON, and during a cold

start after TSOFT_START_V1. If, at the end of the softstart, V1 is still under V1UVLP threshold, then the device goes

into Fail-Safe state.

19.4.7 Electrical characteristics

TA = −40 °C to 125 °C, unless otherwise specified. VSUP = 5.5 V to 40 V, unless otherwise specified. All voltages referenced to ground.

Symbol

Parameter

Min

Typ

Max

Unit

VxMON (x from 0 to 3)

VxMON_OVTH

VxMON overvoltage threshold

102.5+0.5*code_ov

VxMON undervoltage thresholds at 5 V and 3.3 V output

voltage (code_uv = 0010 to 1100)

97.5-0.5*code_uv