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LMKDB1108FS Scheda tecnica(PDF) 38 Page - Texas Instruments |
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LMKDB1108FS Scheda tecnica(HTML) 38 Page - Texas Instruments |
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38 / 126 page ![]() a. For example, if you wanted the fastest, second fastest, and the slowest slew rate, assign 0x0, 0x1, and 0xF to registers SLEWRATE_OPT#. SLEWRATE_OPT1 = 0x0 (fastest), SLEWRATE_OPT2 = 0x1 (second fastest), and SLEWRATE_OPT3 = 0xF (slowest). SLEWRATE_OPT4 does not have to be assigned, but if you want more than one register set to a slew rate, then SLEWRATE_OPT4 can be assigned to any of the three previous settings. 2. Set a slew rate option for each output by using the SLEWRATE_SEL_CLKX_LSB and SLEWRATE_SEL_CLKX_MSB as shown in Table 8-3 or drop-down menus under the Output Slew Rate Control Section in TICSPro. The default SLEWRATE_OPT# register assignment for all outputs is SLEWRATE_OPT2, which has a default slew rate of 0x6. The corresponding ranges for the four default slew rates can be found in Section 6 under CLOCK OUTPUT CHARACTERISTICS - 100MHz 85Ω PCIe or CLOCK OUTPUT CHARACTERISTICS - 100MHz 100Ω PCIe for the specification Output slew rate. Table 8-3. LMKDB11xx Default SLEWRATE_OPT_# Values Register Field Name Default Value Default Slew Rate SLEWRATE_OPT_1 0x0 Highest SLEWRATE_OPT_2 0x6 High (default for all outputs) SLEWRATE_OPT_3 0xA Low SLEWRATE_OPT_4 0xF Lowest Table 8-4. LMKDB11xxFS Default SLEWRATE_OPT_# Values Register Field Name Default Value Default Slew Rate SLEWRATE_OPT_1 0x0 Highest SLEWRATE_OPT_2 0x2 High (default for all outputs) SLEWRATE_OPT_3 0x6 Low SLEWRATE_OPT_4 0xF Lowest Table 8-5. SLEWRATE_SEL_CLKX_LSB & SLEWRATE_SEL_CLKX_MSB Slew Rate Selection SLEWRATE_SEL_CLKX_LSB SLEWRATE_SEL_CLKX_MSB Slew Rate Option Selection 0 0 SLEWRATE_OPT_4 1 0 SLEWRATE_OPT_3 0 1 SLEWRATE_OPT_2 1 1 SLEWRATE_OPT_1 To program the slew rate to the desired slew rate, the following sequence needs to be followed: 1. [Optional]: if the default assignments shown in Table 8-3 for each slew rate speed is not as desired, one of the slew rate options value can be changed to another slew rate. 2. [LMKDB1108 and 1104 only]: Program SLEWRATE_CTRL_MODE register to 1 to select SMBus programming mode for slew rate control. Refer to Section 9 section for LMKDB1108 and LMKDB1104 register bits information. 3. Program SLEWRATE_SEL_CLKX_MSB and SLEWRATE_SEL_CLKX_LSB to assign clock output X to desired slew rate speed option, as shown in Table 8-5. The default assignments for each option can be found in Table 8-3. 8.3.4.3 Programmable Output Swing The LMKDB family supports programmable LP-HCSL swings between a range of 600mV to 975mV. All outputs are programmed to the same output swing via register AMP and AMP_BANKX for both buffer and mux respectively. To program the outputs to the desired swing refer to the Register Maps. LMKDB1102, LMKDB1104, LMKDB1104FS LMKDB1108, LMKDB1108FS, LMKDB1112, LMKDB1120, LMKDB1120FS SNAS855F – NOVEMBER 2023 – REVISED NOVEMBER 2025 www.ti.com 38 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS |
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