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LMKDB1108FS Scheda tecnica(PDF) 73 Page - Texas Instruments |
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LMKDB1108FS Scheda tecnica(HTML) 73 Page - Texas Instruments |
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73 / 126 page  Table 9-74. R53 Register Field Descriptions (continued) Bit Field Type Reset Description 4:0 RESERVED R 0h Reserved 9.3.20 R91 Register (Offset = 5Bh) [Reset = 60h] R91 is shown in Table 9-75. Return to the Summary Table. Table 9-75. R91 Register Field Descriptions Bit Field Type Reset Description 7:4 SLEWRATE_OPT_2 R/W 2h/6h There are four register assignments each storing a slew rate value (chosen out of the 16 available slew rate values). This register bits relate to the 2nd option. Go to Programmable Output Slew Rate section for more information. 0h = 0 1h = 1 2h = 2 (Default for LMKDB1108FS) 3h = 3 4h = 4 5h = 5 6h = 6 (Default for LMKDB1108) 7h = 7 8h = 8 9h = 9 Ah = 10 Bh = 11 Ch = 12 Dh = 13 Eh = 14 Fh = 15 3:0 SLEWRATE_OPT_1 R/W 0h There are four register assignments each storing a slew rate value (chosen out of the 16 available slew rate values). This register bits relate to the 1st option. Go to Programmable Output Slew Rate section for more information. 0h = 0 1h = 1 2h = 2 3h = 3 4h = 4 5h = 5 6h = 6 7h = 7 8h = 8 9h = 9 Ah = 10 Bh = 11 Ch = 12 Dh = 13 Eh = 14 Fh = 15 9.3.21 R92 Register (Offset = 5Ch) [Reset = FAh] R92 is shown in Table 9-76. Return to the Summary Table. www.ti.com LMKDB1102, LMKDB1104, LMKDB1104FS LMKDB1108, LMKDB1108FS, LMKDB1112, LMKDB1120, LMKDB1120FS SNAS855F – NOVEMBER 2023 – REVISED NOVEMBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 73 Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS |
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