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LMKDB1108FS Scheda tecnica(PDF) 7 Page - Texas Instruments |
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LMKDB1108FS Scheda tecnica(HTML) 7 Page - Texas Instruments |
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7 / 126 page ![]() Table 5-1. LMKDB1120 and LMKDB1120FS Pin Functions (continued) PIN TYPE(1) DESCRIPTION NAME(2) (3) NO. vOE16#/NC B3 I Active low input to control CLK16. Internal pulldown resistor. This pin can be left no connect to match with DB2000QL pinout. 0 = Output Active, 1 = Output Inactive vOE17#/NC D2 I Active low input to control CLK17. Internal pulldown resistor. This pin can be left no connect to match with DB2000QL pinout. 0 = Output Active, 1 = Output Inactive vOE18#/NC D11 I Active low input to control CLK18. Internal pulldown resistor. This pin can be left no connect to match with DB2000QL pinout. 0 = Output Active, 1 = Output Inactive vOE19#/NC J11 I Active low input to control CLK19. Internal pulldown resistor. This pin can be left no connect to match with DB2000QL pinout. 0 = Output Active, 1 = Output Inactive SBI_OUT/NC C2 O SBI data output pin/No connect. This pin can be left no connect to match with DB2000QL pinout. vPWRGD/PWRDN# M6 I Power Good/Power Down Active Low. Multifunctional input pin. Internal pullup resistor. On the first low-to-high transition, functions as Power Good pin which starts up the device On the subsequent low/high transitions, functions as Power Down Active Low pin which controls the device to enter or exit power-down mode. Low = power-down mode High = normal operation mode vSBI_EN E2 I SBI Enable. Internal pulldown resistor. Do not change the state of this pin after power-up. Low at power-up = SBI interface disabled. Pin L8, L10 and E11 function as OE pins. High at power-up = SBI interface enabled. Pin L8, L10 and E11 function as SBI interface pins. SMBus and other OE pins remain functional. ^vSADR1_tri B8 I SMBus Address 3-level input pin. Internal pullup and pulldown resistors. ^vSADR0_tri B4 I SMBus Address 3-level input pin. Internal pullup and pulldown resistors. LOS#/NC G11 O Loss of Input Clock Signal Active Low/No Connect. Open drain. Requires external pullup resistor. This pin can be left no connect to match with DB2000QL pinout. Low = Invalid input clock. High = Valid input clock. SMB_DATA L4 I/O SMBus Data. Requires external pullup resistor. No connect if unused. SMB_CLK L5 I SMBus Clock. Requires external pullup resistor. No connect if unused. NC F2, F11, G2, L7 NC No connect. (1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power, NC = No Connect (2) Pins with a "^" prefix have an internal pullup resistor. Pins with a "v" prefix have an internal pulldown resistor. Pins with a "^v" have an internal pullup resistor and an internal pulldown resistor so that mid level is selected when the pin is left floating. Pins with "^/v" have an internal pullup or pulldown based on selected function. (3) The "#" symbol indicates active low. www.ti.com LMKDB1102, LMKDB1104, LMKDB1104FS LMKDB1108, LMKDB1108FS, LMKDB1112, LMKDB1120, LMKDB1120FS SNAS855F – NOVEMBER 2023 – REVISED NOVEMBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS |
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