LMKDB1108FS datasheet(62/126 Pages) TI2

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Table 9-48. R39 Register Field Descriptions

Bit

Field

Type

Reset

Description

7:2

RESERVED

Reserved

LOS_EVT

R/WSC

LOS Event Status When high, indicates that a LOS event was

detected. Can be cleared by writing a 1 to it.

0h = No LOS event detected

1h = LOS event detected

WRITE_LOCK_RW1C

R/W

Clearable SMBus Write Lock bit. When written to one, the SMBus

control Risters cannot be written to. This bit can be cleared by writing

a 1 to it.

0h = SMBus not locked for writing by this bit. See WRITE_LOCK bit.

1h = SMBus locked for writing

9.2.19 R91 Register (Offset = 5Bh) [Reset = 60h]

R91 is shown in Table 9-49.

Return to the Summary Table.

Table 9-49. R91 Register Field Descriptions

Bit

Field

Type

Reset

Description

7:4

SLEWRATE_OPT_2

R/W

There are four register assignments each storing a slew rate value

(chosen out of the 16 available slew rate values). This register bits

relate to the 2nd option. Go to Programmable Output Slew Rate

section for more information.

0h = 0

1h = 1

2h = 2

3h = 3

4h = 4

5h = 5

6h = 6 (Default for LMKDB1112)

7h = 7

8h = 8

9h = 9

Ah = 10

Bh = 11

Ch = 12

Dh = 13

Eh = 14

Fh = 15

LMKDB1102, LMKDB1104, LMKDB1104FS

LMKDB1108, LMKDB1108FS, LMKDB1112, LMKDB1120, LMKDB1120FS

SNAS855F – NOVEMBER 2023 – REVISED NOVEMBER 2025

www.ti.com

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