H8SSLASH2214 datasheet(353/936 Pages) RENESAS

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Section 9 I/O Ports

Rev.4.00 Sep. 18, 2008 Page 293 of 872

REJ09B0189-0400

Pin Functions and Selection Method

P12/

TIOCC0/

TCLKA/

A22

The pin function is switched as shown below according to the combination of the

operating mode, the TPU channel 0 settings (bits MD3 to MD0 in TMDR0, bits IOC3 to

IOC0 in TIOR0L, and bits CCLR2 to CCLR0 in TCR0), bits TPSC2 to TPSC0 in TCR0

to TCR5, bits AE3 to AE0 in PFCR, and bit P12DDR.

Operating mode

Modes 4, 5, 6

Mode 7

AE3 to AE0

Other than B'1111

B'1111

—

TPU channel 0

settings

(1)

in table below

(2)

in table below

—

(1)

in table below

(2)

in table below

P12DDR

—

Pin function

TIOCC0

output

P12

input

P12

output

—

TIOCC0

output

P12

input

P12

output

TIOCC0

input*

—

TIOCC0

input*

TCLKA input*

A22

output

TCLKA input*

TPU channel 0

settings

(2)

(1)

(2)

(1)

(2)

MD3 to MD0

B'0000

B'001x B'0010

B'0011

IOC3 to IOC0

B'0000

B'0100

B'1xxx

B'0001 to B'0011

B'0101 to B'0111

B'xx00

Other

than

B'xx00

Other than B'xx00

CCLR2 to CCLR0

—

Other than

B'101

Output function

—

Output compare

output

—

PWM

mode 1

output*

PWM mode 2

output

—

x: Don’t care

Notes: 1. TIOCC0 input when MD3 to MD0 = B'0000 and IOC3 to IOC0 = B'10xx.

2. TCLKA input when the setting for any of TCR0 to TCR5 is: TPSC2 to

TPSC0 = B'100.

Also, TCLKA input when channels 1 and 5 are set to phase counting

mode.

3. Output is disabled for TIOCD0.

When BFA = 1 or BFB = 1 in TMDR0, output is disabled and the settings in

(2) apply.

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