H8SSLASH2214 datasheet(50/936 Pages) RENESAS

50 / 936 page

Rev.4.00 Sep. 18, 2008 Page l of lx

REJ09B0189-0400

Figure 10.52 Contention between Overflow and Counter Clearing ............................................. 435

Figure 10.53 Contention between TCNT Write and Overflow .................................................... 436

Section 11 Watchdog Timer (WDT)

Figure 11.1 Block Diagram of WDT .......................................................................................... 438

Figure 11.2 Format of Data Written to TCNT and TCSR (Example of WDT0) ........................ 444

Figure 11.3 Format of Data Written to RSTCSR (Example of WDT0) ..................................... 445

Figure 11.4 Operation in Watchdog Timer Mode ...................................................................... 446

Figure 11.5 Operation in Interval Timer Mode .......................................................................... 447

Figure 11.6 Timing of OVF Setting ........................................................................................... 448

Figure 11.7 Timing of WOVF Setting........................................................................................ 449

Figure 11.8 Contention between TCNT Write and Increment.................................................... 450

Section 12 Serial Communication Interface (SCI)

Figure 12.1 Block Diagram of SCI0........................................................................................... 455

Figure 12.2 Block Diagram of SCI1 and SCI2 ........................................................................... 456

Figure 12.3 Examples of Base Clock when Average Transfer Rate Is Selected (1)................... 484

Figure 12.4 Examples of Base Clock when Average Transfer Rate Is Selected (2)................... 485

Figure 12.5 Data Format in Asynchronous Communication

(Example with 8-Bit Data, Parity, Two Stop Bits).................................................. 490

Figure 12.6 Relation between Output Clock and Transfer Data Phase (Asynchronous Mode). 492

Figure 12.7 Sample SCI Initialization Flowchart ....................................................................... 493

Figure 12.8 Sample Serial Transmission Flowchart ................................................................... 494

Figure 12.9 Example of Operation in Transmission in Asynchronous Mode

(Example with 8-Bit Data, Parity, One Stop Bit) .................................................... 496

Figure 12.10 Sample Serial Reception Data Flowchart (1) .......................................................... 497

Figure 12.11 Sample Serial Reception Data Flowchart (2) .......................................................... 498

Figure 12.12 Example of SCI Operation in Reception

(Example with 8-Bit Data, Parity, One Stop Bit) .................................................... 500

Figure 12.13 Example of Inter-Processor Communication Using Multiprocessor Format

(Transmission of Data H'AA to Receiving Station A) ............................................ 502

Figure 12.14 Sample Multiprocessor Serial Transmission Flowchart .......................................... 503

Figure 12.15 Example of SCI Operation in Transmission

(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)................................ 505

Figure 12.16 Sample Multiprocessor Serial Reception Flowchart (1).......................................... 506

Figure 12.17 Sample Multiprocessor Serial Reception Flowchart (2).......................................... 507

Figure 12.18 Example of SCI Operation in Reception

(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)................................ 508

Figure 12.19 Data Format in Synchronous Communication ........................................................ 509

Figure 12.20 Sample SCI Initialization Flowchart ....................................................................... 511

Figure 12.21 Sample Serial Transmission Flowchart ................................................................... 512

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