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H8S/2214 Scheda tecnica(PDF) 488 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 488 Page - Renesas Technology Corp |
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488 / 936 page ![]() Section 10 16-Bit Timer Pulse Unit (TPU) Rev.4.00 Sep. 18, 2008 Page 428 of 872 REJ09B0189-0400 (3) Caution on Period Setting When counter clearing by compare match is set, TCNT is cleared in the final state in which it matches the TGR value (the point at which the count value matched by TCNT is updated). Consequently, the actual counter frequency is given by the following formula: f = φ (N + 1) Where f: Counter frequency φ: Operating frequency N: TGR set value (4) Contention between TCNT Write and Clear Operations If the counter clear signal is generated in the T 2 state of a TCNT write cycle, TCNT clearing takes precedence and the TCNT write is not performed. Figure 10.45 shows the timing in this case. Counter clear signal Write signal Address φ TCNT address TCNT TCNT write cycle T1 T2 N H'0000 Figure 10.45 Contention between TCNT Write and Clear Operations |
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