H8SSLASH2214 datasheet(595/936 Pages) RENESAS

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Section 13 D/A Converter

Rev.4.00 Sep. 18, 2008 Page 535 of 872

REJ09B0189-0400

Bit 5—Reserved: Only 0 should be written to this bit.

If the H8S/2214 Group enters software standby mode when D/A conversion is enabled, the D/A

output is held and the analog power current is the same as during D/A conversion. When it is

necessary to reduce the analog power current in software standby mode, clear the DAOE0 bit to 0

to disable D/A output.

Bits 4 to 0—Reserved: Read-only bits, always read as 1.

13.2.3

Module Stop Control Register C (MSTPCRC)

MSTPC7

R/W

MSTPC6

R/W

MSTPC5

R/W

MSTPC4

R/W

MSTPC3

R/W

MSTPC0

R/W

MSTPC2

R/W

MSTPC1

R/W

Bit

Initial value

R/W

MSTPCRC is an 8-bit readable/writable register that performs module stop mode control.

When the MSTPC5 bit in MSTPCR is set to 1, D/A converter operation stops at the end of the bus

cycle and a transition is made to module stop mode. Registers cannot be read or written to in

module stop mode. For details, see section 17.5, Module Stop Mode.

MSTPCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in

software standby mode.

Bit 5—Module Stop (MSTPC5): Specifies the D/A converter module stop mode.

Bit 5

MSTPC5

Description

D/A converter module stop mode cleared

D/A converter module stop mode set

(Initial value)

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