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H8S/2214 Scheda tecnica(PDF) 112 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 112 Page - Renesas Technology Corp |
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112 / 936 page ![]() Section 2 CPU Rev.4.00 Sep. 18, 2008 Page 52 of 872 REJ09B0189-0400 (a) Normal Mode* (b) Advanced Mode Branch address Specified by @aa:8 Specified by @aa:8 Reserved Branch address Note: * Not available in the H8S/2214 Group. Figure 2.14 Branch Address Specification in Memory Indirect Mode If an odd address is specified in word or longword memory access, or as a branch address, the least significant bit is regarded as 0, causing data to be accessed or instruction code to be fetched at the address preceding the specified address. (For further information, see section 2.5.2, Memory Data Formats.) 2.7.2 Effective Address Calculation Table 2.6 indicates how effective addresses are calculated in each addressing mode. In normal mode the upper 8 bits of the effective address are ignored in order to generate a 16-bit address. |
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