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H8S/2214 Scheda tecnica(PDF) 286 Page - Renesas Technology Corp |
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H8S/2214 Scheda tecnica(HTML) 286 Page - Renesas Technology Corp |
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286 / 936 page ![]() Section 7 DMA Controller Rev.4.00 Sep. 18, 2008 Page 226 of 872 REJ09B0189-0400 Figure 7.12 illustrates operation in block transfer mode when MARA is designated as a block area. Address TB Address BB Transfer Address TA Address BA 1st block 2nd block Nth block Block area Consecutive transfer of M bytes or words is performed in response to one request Legend: Address Address Address Address Where : = LA = LB = LA + SAIDE · (–1)SAID · (2DTSZ · (N – 1)) = LB + DAIDE · (–1)DAID · (2DTSZ · (M · N – 1)) = Value set in MARA = Value set in MARB = Value set in ETCRB = Value set in ETCRAH and ETCRAL TA TB BA BB LA LB N M Figure 7.12 Operation in Block Transfer Mode (BLKDIR = 1) |
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