H8SSLASH2224 datasheet(466/1071 Pages) RENESAS

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Section 11 16-Bit Timer Pulse Unit (TPU)

Rev. 5.00 Aug 08, 2006 page 380 of 982

REJ09B0054-0500

Table 11.17 TIORL_3

Description

Bit 7

IOD3

Bit 6

IOD2

Bit 5

IOD1

Bit 4

IOD0

TGRD_3

Function*

TIOCD3 Pin Function*

Output disabled

Output

compare

Initial output is 0 output

0 output at compare match

Initial output is 0 output

1 output at compare match

Initial output is 0 output

Toggle output at compare match

Output disabled

Initial output is 1 output

0 output at compare match

Initial output is 1 output

1 output at compare match

Initial output is 1 output

Toggle output at compare match

Capture input source is TIOCD3 pin

Input capture at rising edge

Capture input source is TIOCD3 pin

Input capture at falling edge

Input

capture

Capture input source is TIOCD3 pin

Input capture at both edges

××

Capture input source is channel 4/count clock

Input capture at TCNT_4 count-up/count-

down*

Legend:

×: Don’t care

Notes: 1. When bits TPSC2 to TPSC0 in TCR_4 are set to B'000 and

φ/1 is used as the TCNT_4

count clock, this setting is invalid and input capture is not generated.

2. When the BFB bit in TMDR_3 is set to 1 and TGRD_3 is used as a buffer register, this

setting is invalid and input capture/output compare is not generated.

3. Not available in the H8S/2227 Group.

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