H8SSLASH2224 datasheet(28/1071 Pages) RENESAS

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Rev. 5.00 Aug 08, 2006 page xxviii of lxxxvi

Item

Page

Revision (See Manual for Details)

12.3.4 Timer Control

446

Table amended

Bit

Bit Name

Initial

Value

R/W

Description

CKS2

CKS1

CKS0

R/W

Clock Select 2 to 0

The input clock can be selected from three clocks

divided from the system clock ( ). When use of an

external clock is selected, three types of count can be

selected: at the rising edge, the falling edge, and both

rising and falling edges.

000: Clock input disabled

001:

φ /8 internal clock source, counted on the falling

edge

010:

φ /64 internal clock source, counted on the falling

edge

011:

φ /8192 internal clock source, counted on the

falling edge

100: For channel 0:

Counted on TCNT1 overflow signal*

For channel 1:

Counted on TCNT0 compare-match A*

For channel 2:*

Counted on TCNT3 overflow signal*

For channel 3:*

Counted on TCNT2 compare-match A *

101: External clock source, counted at rising edge

110: External clock source, counted at falling edge

111: External clock source, counted at both rising and

falling edges

Note 2 added

Note: 2. Not available in the H8S/2237 Group and

H8S/2227 Group.

12.3.5 Timer Control/Status

449

• TCSR_1 and TCSR_3*

Table amended

R/(W)*

450

Note 1 added

Note: 1. Not available in the H8S/2237 Group and

H8S/2227 Group.

451

• TCSR_2*

Table amended

R/(W)*

452

Note 1 added

Note: 1. Not available in the H8S/2237 Group and

H8S/2227 Group.

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