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H8S/2224 Scheda tecnica(PDF) 474 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 474 Page - Renesas Technology Corp |
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474 / 1071 page ![]() Section 11 16-Bit Timer Pulse Unit (TPU) Rev. 5.00 Aug 08, 2006 page 388 of 982 REJ09B0054-0500 Table 11.25 TIORL_3 Description Bit 3 IOC3 Bit 2 IOC2 Bit 1 IOC1 Bit 0 IOC0 TGRC_3 Function* 2 TIOCC3 Pin Function* 2 0 0 0 0 Output disabled 1 Output compare register* 1 Initial output is 0 output 0 output at compare match 1 0 Initial output is 0 output 1 output at compare match 1 Initial output is 0 output Toggle output at compare match 1 0 0 Output disabled 1 Initial output is 1 output 0 output at compare match 1 0 Initial output is 1 output 1 output at compare match 1 Initial output is 1 output Toggle output at compare match 1 0 0 0 Capture input source is TIOCC3 pin Input capture at rising edge 1 Capture input source is TIOCC3 pin Input capture at falling edge 1 × Input capture register* 1 Capture input source is TIOCC3 pin Input capture at both edges 1 ×× Capture input source is channel 4/count clock Input capture at TCNT_4 count-up/count-down Legend: ×: Don’t care Notes: 1. When the BFA bit in TMDR_3 is set to 1 and TGRC_3 is used as a buffer register, this setting is invalid and input capture/output compare is not generated. 2. Not available in the H8S/2227 Group. |
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