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H8S/2224 Scheda tecnica(PDF) 932 Page - Renesas Technology Corp |
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H8S/2224 Scheda tecnica(HTML) 932 Page - Renesas Technology Corp |
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932 / 1071 page ![]() Section 27 Electrical Characteristics Rev. 5.00 Aug 08, 2006 page 846 of 982 REJ09B0054-0500 Item Symbol Min Typ Max Unit Test Conditions RES 1.0 µA STBY, NMI, MD2 to MD0, FWE 1.0 µA Vin = 0.5 to VCC – 0.5 V Input leakage current Ports 4 and 9 | Iin | 1.0 µA Vin = 0.5 to AVCC – 0.5 V Three states leakage current (off) Ports 1, 3, 7, and A to G | ITSI | 1.0 µA Vin = 0.5 to VCC – 0.5 V Input pull-up MOS current Ports A to E –IP 10 300 µA Vin = 0V Notes: 1. If the A/D or D/A converter is not used, the AVCC, Vref, and AVSS pins should not be open. Even if the A/D or D/A converter is not used, connect the AVCC and Vref pins to VCC and supply 4.0 V to 5.5 V. In this case, Vref ≤ AVCC. 2. P35/SCK1/SCL0 and P34/SDA0 function as NMOS push-pull output. To output the high voltage from SCL0 and SDA0 (ICE = 1), connect an external pull-up resistor. NMOS controls P35/SCK1 and P34 (ICE = 0) to output the high voltage. 3. In the case when IICS = 0 and ICE = 0. Low voltage output of SCL1, SCL0, SDA1, and SDA0 with bus driving function is specified in table 27.4. |
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